Intel Jobs in India
594 open roles across 36 cities and 9 specialisations
By specialisation
By city
Penang83
2 Locations78
Bangalore55
Phoenix49
Hillsboro47
3 Locations43
Kulim24
4 Locations22
Leixlip21
Albuquerque19
Santa Clara18
Guadalajara17
Austin15
Haifa13
Taipei13
Ho_Chi_Minh_City13
Virtual Canada8
Tokyo8
Virtual US7
5 Locations5
Folsom5
San Jose5
Chengdu5
Petah-Tikva3
Gdansk3
6 Locations3
Virtual India2
Kiryat-Gat2
Jerusalem1
9 Locations1
Hsinchu1
New Albany1
D.C.1
Shanghai1
Munich1
Virtual United Kingdom1
All Intel roles (594)
Intel
Solution Architect - Telco
Virtual India|Other
Intel
Principal Engineer, Physical Design
India, Bangalore|Physical Design
Intel
Senior AI Software Engineer - Neuromorphic Computing
3 Locations|Other
Intel
Senior CPU Pre-Silicon Verification Engineer
2 Locations|Verification
Intel
CPU Formal Verification Engineer
5 Locations|Verification
Intel
Senior Out-of-Order CPU Architect
US, Texas, Austin|Other
Intel
Senior CPU Performance Architect
5 Locations|Other
Intel
Senior Middleware Development Engineer
2 Locations|Other
Intel
Senior Member of Technical Staff (CMP) Engineer
2 Locations|Other
Intel
IP Enablement Application Engineer
3 Locations|Other
Intel
DFT Application Engineer
3 Locations|DFT
Intel
System Simulation Module Development Engineer
Virtual Canada|Other
Intel
Foveros Direct Pathfinding Integration
2 Locations|Other
Intel
Standard Cell Library Design Engineer
Malaysia, Penang|Other
Intel
Semiconductor Device Modeling Engineer
2 Locations|Other
Intel
CPU Core Senior Physical Design Engineer
US, California, Folsom|Physical Design
Intel
Module Equipment Technician (Contract)
Malaysia, Penang|Other
Intel
Firmware HW Integration Validation Lead
US, Oregon, Hillsboro|Embedded
Intel
Senior Director, AI SOC Design Verification
US, California, Santa Clara|Verification
Intel
Senior Physical Design Integration Engineer
3 Locations|Physical Design
Intel
Mixed Signal Logic Design Engineer
3 Locations|RTL Design
Intel
Module Equipment Technician (Contract)
Malaysia, Penang|Other
Intel
Process Integration Development Engineer
US, Oregon, Hillsboro|Other
Intel
Senior CPU Power Management Architect
2 Locations|Other
Intel
Senior Standard Cell Library Design Manager
Malaysia, Penang|Other
Intel
SoC/IP Design Verification Engineer
Mexico, Guadalajara|Verification
Intel
Physical Design Engineer
Malaysia, Penang|Physical Design
Intel
Process Technology Design Engineer
Israel, Haifa|Other
Intel
Senior VLSI Design Engineer
Israel, Haifa|Other
Intel
AI Performance Library Architect
2 Locations|Other
Intel
Software Application Development Engineer
US, Arizona, Phoenix|Other
Intel
Substrate Supplier Enablement Engineer
US, Arizona, Phoenix|Other
Intel
CPU Performance Architect
US, Texas, Austin|Other
Intel
Practical Engineering Student - Kiryat Gat
Israel, Kiryat-Gat|Other
Intel
CPU RTL Design Engineer
2 Locations|RTL Design
Intel
CPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG)
2 Locations|SoC
Intel
ICE Graduate Talent
2 Locations|Other
Intel
Wi-Fi System Architect
2 Locations|Other
Intel
Manufacturing Operators (Contract)
Malaysia, Penang|Other
Intel
IP Design Verification Engineer
Israel, Petah-Tikva|Verification
Intel
Sr. Substrates Development and Ramp Engineer
Taiwan, Taipei|Other
Intel
Manufacturing Operators
Malaysia, Kulim|Other
Intel
Advanced Packaging Materials Supply Chain Engineer
Japan, Tokyo|Other
Intel
Senior DSP Algorithm Engineer
Virtual US|Other
Intel
Analog and Mixed Signal Design Engineer
2 Locations|Analog/MS
Intel
Senior Technical Lead -Power & BatteryLife
2 Locations|Other
Intel
Senior Verification Engineer
Virtual Canada|Verification
Intel
Semiconductor Manufacturing Engineer
Malaysia, Penang|Other
Intel
Senior CPU Physical Design Engineer
2 Locations|Physical Design
Intel
Account Sales
Japan, Tokyo|Other
Intel
Senior Account Sales Manager
Japan, Tokyo|Other
Intel
Director-Analog Design & Infrastructure Design Automation
4 Locations|Analog/MS
Intel
Senior CPU Verification Engineer
2 Locations|Verification
Intel
Semiconductor Foundry Demand Senior Business Strategist
Taiwan, Taipei|Other
Intel
Semiconductor Foundry Demand Business Strategist
Taiwan, Taipei|Other
Intel
Compiler Engineer
2 Locations|Other
Intel
E-Core/Quark CPU Pre-Silicon Validation Design Engineer
Malaysia, Penang|Other
Intel
Linux Driver Wifi developer
Israel, Jerusalem|Other
Intel
Senior Formal Verification Engineer – AI SoC Development
4 Locations|Verification
Intel
Senior Photonic-Integrated-Circuit Engineer
US, California, Santa Clara|Other
Intel
Facilities Mechanical Project Coordinator ( Contract)
2 Locations|Other
Intel
Director - Foundry Business Development
US, California, Santa Clara|Other
Intel
ASIC/FPGA Design Engineer
Malaysia, Penang|FPGA
Intel
CPU Pre-Silicon Verification Engineer
Mexico, Guadalajara|Verification
Intel
Physical Design (Backend) Technical Leader
Israel, Petah-Tikva|Physical Design
Intel
Lead Analog SerDes Architect/Design Engineer
US, California, Santa Clara|Analog/MS
Intel
Lead Senior Design Engineer – AI SoC Development
3 Locations|SoC
Intel
Module Equipment Technician (Kỹ Thuật Viên Bảo trì Sửa chữa)
Vietnam, Ho_Chi_Minh_City|Other
Intel
Manufacturing Operator (Nhân viên vận hành máy)
Vietnam, Ho_Chi_Minh_City|Other
Intel
CPU power Architect
Israel, Haifa|Other
Intel
Cloud Application Development Engineer
India, Bangalore|Other
Intel
Image Processing Engineer (C++/Linux)
US, California, Santa Clara|Other
Intel
APTM NPI Integration
US, New Mexico, Albuquerque|Other
Intel
Sr. Security Architect
4 Locations|Other
Intel
Atom CPU Architecture Engineer
US, Texas, Austin|Other
Intel
Module Engineer
Malaysia, Penang|Other
Intel
Software Development Engineer
4 Locations|Other
Intel
Optical Component Link Simulation Student Worker
Mexico, Guadalajara|Other
Intel
Electromagnetic Modeling Student Worker
Mexico, Guadalajara|Other
Intel
Design Verification Student Worker
Mexico, Guadalajara|Verification
Intel
Module Equipment Technician (Contract)
Malaysia, Kulim|Other
Intel
Senior PCB/CAD Layout Engineer
US, Oregon, Hillsboro|CAD/EDA
Intel
AI Algorithm Research Intern – Neuromorphic Computing
Mexico, Guadalajara|Other
Intel
SOC Physical Design Static Timing Analysis Engineer
2 Locations|Physical Design
Intel
Wet Etch Cleans Technical Manager
US, Oregon, Hillsboro|Other
Intel
Memory Validation Intern
Mexico, Guadalajara|Other
Intel
Facilities Power Distribution Electrical Engineer
US, California, Santa Clara|Other
Intel
CPU Physical Design Engineer -Technology & Pathfinding
2 Locations|Physical Design
Intel
CPU Circuit Design Engineer
2 Locations|Other
Intel
System Modelling Engineer
India, Bangalore|Other
Intel
Analog Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
Analog Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
Analog Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
Analog Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
Analog Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
SerDes Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
AI Frameworks Engineer
Ireland, Leixlip|Other
Intel
EDA Tools Software Engineer
3 Locations|CAD/EDA
Intel
Principal Analog Circuit Design Engineer - SerDes
3 Locations|Analog/MS
Intel
Supply Chain Engineer
Malaysia, Kulim|Other
Intel
Senior AI Software Architect - Runtime
3 Locations|Other
Intel
AI Software Engineering Intern
2 Locations|Other
Intel
Senior AI Algorithm Engineer in oneDNN
2 Locations|Other
Intel
TD Media and Collaterals Development Engineer
US, Arizona, Phoenix|Other
Intel
Design Technology Tool Enablement Engineer
3 Locations|Other
Intel
IT Support Specialist
India, Bangalore|Other
Intel
Security Software Development Engineer
Poland, Gdansk|Other
Intel
Senior Clock Architecture & Design Engineer
2 Locations|Other
Intel
Software Application Development Engineer
US, Arizona, Phoenix|Other
Intel
Senior Applications and Solutions Engineer - Foundry Services
3 Locations|Other
Intel
Module Engineering Manager
Malaysia, Penang|Other
Intel
Network Security Engineer
US, Arizona, Phoenix|Other
Intel
Experienced IP Logic Design Engineer
Costa Rica, San Jose|RTL Design
Intel
Analog Design Architect
India, Bangalore|Analog/MS
Intel
Mixed Signal Design Verification Engineer
India, Bangalore|Verification
Intel
Mixed Signal Logic Design Engineer
Malaysia, Penang|RTL Design
Intel
Packaging Module Development Engineer
US, Arizona, Phoenix|Other
Intel
Data Science Student for AI Solutions Group
Israel, Petah-Tikva|Other
Intel
Assembly Equipment Group Department Manager
Vietnam, Ho_Chi_Minh_City|Other
Intel
IP Design Verification Engineer
Malaysia, Penang|Verification
Intel
Systems and Solutions Engineer
Taiwan, Taipei|Other
Intel
Module Engineer
Malaysia, Penang|Other
Intel
SoC Logic Design Engineer
India, Bangalore|RTL Design
Intel
Director-Foundry Customer Planning
US, California, Santa Clara|Other
Intel
Product Development Engineer
Malaysia, Penang|Other
Intel
Analog Mixed Signal Design Engineer
Virtual Canada|Analog/MS
Intel
ASIC and Custom Silicon Sales Leader
4 Locations|Other
Intel
Device Engineer
3 Locations|Other
Intel
Logic Design Team Lead
2 Locations|RTL Design
Intel
Module Equipment Technician (Contract)
Malaysia, Kulim|Other
Intel
CPU Circuit Design Engineer
US, Texas, Austin|Other
Intel
Memory Electrical Validation Engineer
US, Oregon, Hillsboro|Other
Intel
Module Development Defect Inspection Engineer
US, Oregon, Hillsboro|Other
Intel
Sales Operations Analyst
Malaysia, Penang|Other
Intel
Senior GenAI Software Solutions Engineer
Malaysia, Penang|Other
Intel
Sr. Director of Platform Program Management
4 Locations|Other
Intel
AI Research Engineer/Scientist (OpenVINO, NNCF)
Ireland, Leixlip|Other
Intel
General Manager, Intel Wireless Solutions
3 Locations|Other
Intel
Module Equipment Technician (Contract)
Malaysia, Kulim|Other
Intel
Standard Cell Design Engineer
Malaysia, Penang|Other
Intel
Atom CPU Layout Design Engineer
Mexico, Guadalajara|Other
Intel
Atom CPU Layout Design Engineer
Mexico, Guadalajara|Other
Intel
SoC Design Engineer
US, Texas, Austin|SoC
Intel
Yield and Process Control Automation Engineer
US, Arizona, Phoenix|Other
Intel
Module Engineering Undergraduate Intern
Malaysia, Kulim|Other
Intel
Logic Design Engineer
Israel, Haifa|RTL Design
Intel
Manufacturing Operator (Contract)
Malaysia, Kulim|Other
Intel
CPU Circuit Design Engineer
US, Texas, Austin|Other
Intel
Consumer Industries Solution Lead
4 Locations|Other
Intel
Principal Analog Circuit Design Engineer - SerDes
Virtual Canada|Analog/MS
Intel
Principal Analog Circuit Design Engineer - SerDes
Virtual Canada|Analog/MS
Intel
Firewall Network Security Engineer
US, Arizona, Phoenix|Other
Intel
Module Development Engineer
5 Locations|Other
Intel
Process Integration and Yield Technician
US, Oregon, Hillsboro|Other
Intel
AI Software Development Engineer
3 Locations|Other
Intel
Early Careers Manufacturing Technician
Ireland, Leixlip|Other
Intel
EDA Tools Hardware Engineer
Malaysia, Penang|CAD/EDA
Intel
IP Design verification Engineer
India, Bangalore|Verification
Intel
IP RTL Design Engineer
India, Bangalore|RTL Design
Intel
Physical Verification Engineer
3 Locations|Verification
Intel
Static Timing Analysis Engineer
India, Bangalore|Other
Intel
Graduate Talent (GenAI Software Solutions Engineer)
Malaysia, Penang|Other
Intel
Facilities Engineer Instrumentation and Controls - Intel Contract Employee
US, Arizona, Phoenix|Other
Intel
Director, Global Social Media and Community
US, California, Santa Clara|Other
Intel
Senior Physical Design Engineer
Malaysia, Penang|Physical Design
Intel
Graduate Talent (Product Enablement and Solutions)
Malaysia, Penang|Other
Intel
Quantum Computing Measurement Engineer
US, Oregon, Hillsboro|Other
Intel
Ocotillo Technology Fabrication Shift Group Leader
US, Arizona, Phoenix|Other
Intel
Silicon Packaging Design Engineer
2 Locations|Other
Intel
Ocotillo Technology Fabrication Experienced Module Engineer
US, Arizona, Phoenix|Other
Intel
Accountant
Malaysia, Penang|Other
Intel
Senior CPU Pre-Si Verification Engineer
Mexico, Guadalajara|Verification
Intel
AI SoC Design Engineer
India, Bangalore|SoC
Intel
Load Balancer Network Engineer
2 Locations|Other
Intel
CPU Memory Design Engineer
US, Texas, Austin|Other
Intel
CPU Memory Design Engineer
US, Texas, Austin|Other
Intel
Mixed Signal Logic Design Engineer
3 Locations|RTL Design
Intel
Sr. Software Engineering Manager – Infrastructure and Security
Ireland, Leixlip|Other
Intel
Manufacturing Operation Manager
Malaysia, Kulim|Other
Intel
Analytics and AI Solution Architect
4 Locations|Other
Intel
Module Development Engineer
3 Locations|Other
Intel
Module Process Engineer
Ireland, Leixlip|Other
Intel
Intel Foundry Module Development Engineer
US, Oregon, Hillsboro|Other
Intel
CPU Performance Architect
India, Bangalore|Other
Intel
CPU Physical Design Engineer
US, Texas, Austin|Physical Design
Intel
RF Hardware Design Engineer
2 Locations|Other
Intel
Retail Sales and Marketing Intern
2 Locations|Other
Intel
Identity Security - PKI Engineer
2 Locations|Other
Intel
Enterprise Systems Analyst
3 Locations|Other
Intel
CPU Physical Design Engineer
US, Texas, Austin|Physical Design
Intel
CPU Physical Design Engineer
US, Texas, Austin|Physical Design
Intel
Principal Engineer, Hybrid Bonding Module
US, Oregon, Hillsboro|Other
Intel
FCO Functional Area Industrial Engineer
US, Arizona, Phoenix|Other
Intel
Mechanical Project Engineer
US, Arizona, Phoenix|Other
Intel
NPI/Foundry Operational Analyst
Vietnam, Ho_Chi_Minh_City|Other
Intel
Senior Post Silicon CPU Debug Engineer
Israel, Haifa|Other
Intel
Director, SoC Design Engineering
3 Locations|SoC
Intel
NMSi- F11x Dry Etch Module Group Leader
US, New Mexico, Albuquerque|Other
Intel
Ocotillo Technology Fabrication Production Manufacturing Engineer
US, Arizona, Phoenix|Other
Intel
Experienced Security Software development Engineer
Israel, Haifa|Other
Intel
Memory Circuit Design Engineer
US, Texas, Austin|Other
Intel
ADCE Packaging Design Architect
9 Locations|Analog/MS
Intel
FCO Strategic/Development Functional Area Industrial Engineer
2 Locations|Other
Intel
Product Development Engineer
US, Oregon, Hillsboro|Other
Intel
Foundry Strategic Industrial Engineer
3 Locations|Other
Intel
Physical Design Engineer- Foundry Services
US, Arizona, Phoenix|Physical Design
Intel
Power Delivery Engineer
India, Bangalore|Other
Intel
Packaging Thermal Engineer
Taiwan, Hsinchu|Other
Intel
IA Core Post Silicon Validation Engineer
US, Texas, Austin|Other
Intel
Senior CPU RTL Design Engineer
2 Locations|RTL Design
Intel
Senior SoC Power Management Architect
US, Oregon, Hillsboro|SoC
Intel
Ocotillo Technology Fabrication Process Integration and Yield Engineer
US, Arizona, Phoenix|Other
Intel
OTF Failure Analysis Technician - Night Shift
US, Arizona, Phoenix|Other
Intel
Experienced Manufacturing Technician
Ireland, Leixlip|Other
Intel
Senior Silicon Photonics TD Reliability Engineer
3 Locations|Other
Intel
Senior Technologist, Hybrid Bonding Module
US, Oregon, Hillsboro|Other
Intel
Infrastructure and DevOps Engineer
India, Bangalore|Other
Intel
Robotics/Physical AI Sales
Japan, Tokyo|Other
Intel
Software Application Development Engineer
Malaysia, Penang|Other
Intel
Design Automation Engineer (TFM/EDA)
4 Locations|CAD/EDA
Intel
Senior SoC Compute/Memory Subsystem Architect
6 Locations|SoC
Intel
SoC Compute/Memory Subsystem Architect
Ireland, Leixlip|SoC
Intel
CAD/EDA Tools Automation Engineer
US, Oregon, Hillsboro|CAD/EDA
Intel
Senior SoC Network Subsystem Architect
6 Locations|SoC
Intel
Senior SoC Chiplet Architect
6 Locations|SoC
Intel
Advanced Packaging Materials Sr. Commodity Manager
Japan, Tokyo|Other
Intel
Manufacturing Technical Supervisor (Operations)
Malaysia, Penang|Other
Intel
Senior Staff Analog Circuit Design Engineer - SerDes
Virtual Canada|Analog/MS
Intel
Operations Research Engineer
3 Locations|Other
Intel
Senior Analog Design Engineer
2 Locations|Analog/MS
Intel
Analog IP Design Execution Manager
3 Locations|Analog/MS
Intel
Foundry Site Quality Program Manager
US, Arizona, Phoenix|Other
Intel
Strategic/Development Industrial Engineer
Ireland, Leixlip|Other
Intel
Ecosystem Development Specialist
3 Locations|Other
Intel
Manufacturing Operator (Contract)
Malaysia, Penang|Other
Intel
Senior Thin Films Engineer
2 Locations|Other
Intel
Senior Design Verification Engineer
US, California, Santa Clara|Verification
Intel
Senior Customer Technical Enablement and Debug Engineer
2 Locations|Other
Intel
Quality Operations Manager (QOM)
2 Locations|Other
Intel
Senior EDA Tools Software Engineer
US, California, Santa Clara|CAD/EDA
Intel
Senior Analog IP Integration, Power, and SI Engineer
2 Locations|Analog/MS
Intel
Network Platform Architect
4 Locations|Other
Intel
Analog Design Engineering Manager
2 Locations|Analog/MS
Intel
Device Engineer
Ireland, Leixlip|Other
Intel
Intel Foundry Advanced Device Development Engineer
Taiwan, Taipei|Other
Intel
Graduate Talent (RF Test Product Development Engineer)
Malaysia, Penang|Other
Intel
Platform Integration Engineer
India, Bangalore|Other
Intel
Senior Mixed Signal Validation and Debug Engineer
India, Bangalore|Analog/MS
Intel
EDA Design Flow Development Engineer
4 Locations|CAD/EDA
Intel
EDA Tools Hardware Engineer
4 Locations|CAD/EDA
Intel
EDA Tools Hardware Engineer
4 Locations|CAD/EDA
Intel
Business Development Manager
Taiwan, Taipei|Other
Intel
Accountant
Malaysia, Penang|Other
Intel
Sr. CPU RTL Front End Methodology Engineer
3 Locations|RTL Design
Intel
AI Software Engineering Intern
US, Arizona, Phoenix|Other
Intel
Accountant
Malaysia, Penang|Other
Intel
Linux Development Engineer
India, Bangalore|Other
Intel
Qubit Control Physical Design Engineer
US, Oregon, Hillsboro|Physical Design
Intel
APTM Yield Analysis Senior Engineer / Team Leader
2 Locations|Other
Intel
Quantum Error Correction Software Engineer
2 Locations|Other
Intel
Senior Materials Program Manager - Direct Material
Malaysia, Penang|Other
Intel
Software Enabling and Optimization Engineer
Malaysia, Penang|Other
Intel
Senior RF Integration Engineer
2 Locations|Other
Intel
Foundry Solutions Architect - IGT
2 Locations|Other
Intel
Facilities Electrical Engineer
US, Oregon, Hillsboro|Other
Intel
Product Development Engineer - Scan Diagnostics
3 Locations|DFT
Intel
Analog Engineer
4 Locations|Analog/MS
Intel
Construction Project Manager
US, Arizona, Phoenix|Other
Intel
Memory Validation Manager
Taiwan, Taipei|Other
Intel
Supply Chain Business Analyst
India, Bangalore|Other
Intel
Operations Research Engineer
India, Bangalore|Other
Intel
Senior Member of Technical Staff, Thin Films Engineer
2 Locations|Other
Intel
CPU Design Verification Engineer
Malaysia, Penang|Verification
Intel
CPU HVM Functional-Test Verification Engineer
Malaysia, Penang|Verification
Intel
Product Development Engineer (Contract)
Malaysia, Penang|Other
Intel
ECG Business Development Manager
Malaysia, Penang|Other
Intel
Site Services Specialist
Malaysia, Penang|Other
Intel
Physical Design Engineer
India, Bangalore|Physical Design
Intel
CPU DFD Validation Engineer
Malaysia, Penang|Other
Intel
Module Development Engineer - RF Test
US, Arizona, Phoenix|Other
Intel
Defect Review Technician
Malaysia, Penang|Other
Intel
Staff SOC DFT Engineer
Malaysia, Penang|DFT
Intel
E-core CPU Physical Design Engineer
Malaysia, Penang|Physical Design
Intel
E-core CPU Physical Design Engineer
Malaysia, Penang|Physical Design
Intel
Senior Logic Design Verification Engineer
Malaysia, Penang|Verification
Intel
Facilities Electrical Engineer
US, New Mexico, Albuquerque|Other
Intel
Assembly and Test Commodity Manager
US, Arizona, Phoenix|Other
Intel
Process Integration, Yield and Defect Reduction Engineering Manager
US, New Mexico, Albuquerque|Other
Intel
AIG Power Delivery Pathfinding Researcher
US, Oregon, Hillsboro|Other
Intel
Senior Process Engineer
Ireland, Leixlip|Other
Intel
Defect Review Technician
Malaysia, Penang|Other
Intel
Yield Defect Metrology Technician
Malaysia, Penang|Other
Intel
Hardware Platform Applications Engineer - Military & Aerospace
4 Locations|Other
Intel
Sales and Operations Planning Business Architect
3 Locations|Other
Intel
Factory Construction Program Manager
US, Ohio, New Albany|Other
Intel
Analog Circuit Design Engineer
4 Locations|Analog/MS
Intel
IP Design Verification Engineer
2 Locations|Verification
Intel
AI Product Analyst student for AI Solutions Group
Israel, Haifa|Other
Intel
Machine Learning Engineer student for AI Solutions Group
Israel, Haifa|Other
Intel
AI Product Analyst Student for AI Solutions Group (Beer Sheva)
Israel, Kiryat-Gat|Other
Intel
Process Integration Engineer
Ireland, Leixlip|Other
Intel
CDAT Manufacture Technician
PRC, Chengdu|Other
Intel
Module Equipment Technician
PRC, Chengdu|Other
Intel
Sr. Substrates Development and Ramp Engineer
2 Locations|Other
Intel
Shift Yield Defect Metrology Engineer
Malaysia, Penang|Other
Intel
Shift Yield Defect Metrology Engineer
Malaysia, Penang|Other
Intel
Post-silicon Validation and Debug Engineer
2 Locations|Other
Intel
Software Engineer - Compute Infrastructure and Security
2 Locations|Other
Intel
Accounting Manager
2 Locations|Other
Intel
Senior Physical Design Engineer
Costa Rica, San Jose|Physical Design
Intel
Principal Engineer, AI Software Solutions
2 Locations|Other
Intel
Senior RTL Design Engineer
India, Bangalore|RTL Design
Intel
Supply Chain Engineer
Ireland, Leixlip|Other
Intel
CDAT Assembly Module Engineer
PRC, Chengdu|Other
Intel
Senior Gen AI Software Solutions Engineer
2 Locations|Other
Intel
Physical Design Engineer
Mexico, Guadalajara|Physical Design
Intel
Process and Equipment Engineer (Contract)
Malaysia, Penang|Other
Intel
Mixed Signal Logic Design Engineer
India, Bangalore|RTL Design
Intel
Software Enabling and Optimization Engineer
Taiwan, Taipei|Other
Intel
Software Enabling and Optimization Engineer
Taiwan, Taipei|Other
Intel
Software Enabling and Optimization Engineer
Taiwan, Taipei|Other
Intel
Vice President, U.S. Government Affairs
US, Washington, D.C.|Other
Intel
Manufacturing Engineering Group Leader
US, New Mexico, Albuquerque|Other
Intel
Supply Chain Engineer (SCE)
2 Locations|Other
Intel
Install Qualification Operations Specialist
US, Arizona, Phoenix|Other
Intel
Verification Engineer Senior
US, Texas, Austin|Verification
Intel
Principal Engineer, Emulation
US, Texas, Austin|Other
Intel
Principal Engineer, Verification
Virtual US|Verification
Intel
Electrical Project Engineer - Global Construction Engineering
US, Oregon, Hillsboro|Other
Intel
Intel Foundry Yield Development Engineer
2 Locations|Other
Intel
Design Verification Engineer
US, California, Santa Clara|Verification
Intel
SOC Physical Design Engineer
India, Bangalore|Physical Design
Intel
Data Scientist
Malaysia, Penang|Other
Intel
Module Equipment Technician (Contract)
Malaysia, Penang|Other
Intel
Supply Chain Engineer
Malaysia, Penang|Other
Intel
Sales Applications Engineer
Taiwan, Taipei|Other
Intel
Silicon Validation Eng Undergraduate Intern
Malaysia, Penang|Other
Intel
Analog Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
IP Design Verification Engineer
4 Locations|Verification
Intel
Memory Circuit Design Engineer
4 Locations|Other
Intel
Facilities Water/Waste Treatment Technician
US, New Mexico, Albuquerque|Other
Intel
Software Application Development Engineer - Sales Incentives
India, Bangalore|Other
Intel
Defect Reduction Engineer
Ireland, Leixlip|Other
Intel
Defect Metrology Engineer
Ireland, Leixlip|Other
Intel
SoC Logic Design Engineer
3 Locations|RTL Design
Intel
Senior CPU RTL Design Engineer – Power Management
2 Locations|RTL Design
Intel
Manufacturing Technician ( 1 year contract)
Vietnam, Ho_Chi_Minh_City|Other
Intel
High speed PHY System Architect
2 Locations|Other
Intel
Credit Manager
US, California, Folsom|Other
Intel
Advanced Packaging Metro Module Engineer
US, New Mexico, Albuquerque|Other
Intel
Advanced Packaging Singulation Engineer
US, New Mexico, Albuquerque|Other
Intel
Advanced Packaging Singulation Module Engineering Manager
US, New Mexico, Albuquerque|Other
Intel
Sr. EDA Tools Engineer - PERC ESD
US, Oregon, Hillsboro|CAD/EDA
Intel
Automation Sr. Commodity Manager
US, Arizona, Phoenix|Other
Intel
Software Development Engineer - Intel Contract Employee
3 Locations|Other
Intel
Supply Chain Engineer (SCE)
Ireland, Leixlip|Other
Intel
Test Equipment Specialist
Vietnam, Ho_Chi_Minh_City|Other
Intel
GPU Software Engineer
PRC, Shanghai|Other
Intel
Finance Intern
Malaysia, Penang|Other
Intel
Graduate Talent (Firmware Development Engineer)
Malaysia, Penang|Embedded
Intel
Graduate Talent (Solution Enabling Engineer)
Malaysia, Penang|Other
Intel
Senior CPU Core Physical Design Engineer
2 Locations|Physical Design
Intel
Packaging Module Development Engineer
US, Arizona, Phoenix|Other
Intel
Mixed Signal Logic Design Engineer
3 Locations|RTL Design
Intel
Silicon Photonics TD Process/Product Integration Engineer
US, New Mexico, Albuquerque|Other
Intel
Senior Staff Collateral Design and DFM Engineer
3 Locations|Other
Intel
Staff Process Engineer, Dry Etch
2 Locations|Other
Intel
Senior Staff Process Engineer – Dry Etch
2 Locations|Other
Intel
Staff Chemical Mechanical Planarization (CMP) Engineer
US, Oregon, Hillsboro|Other
Intel
Ocotillo Technology Fabrication Dry Etch Module Engineer
US, Arizona, Phoenix|Other
Intel
Ocotillo Technology Fabrication Dry Etch Shift Group Leader
US, Arizona, Phoenix|Other
Intel
Principal Collateral Device Engineer
3 Locations|Other
Intel
Yield Development Engineering Manager-Strategic Programs
2 Locations|Analog/MS
Intel
Security Software Development Engineer
Israel, Haifa|Other
Intel
Facilities Mechanical Technician
US, Arizona, Phoenix|Other
Intel
Ocotillo Technology Fabrication Module Equipment Technician
US, Arizona, Phoenix|Other
Intel
Construction Tool Install Engineer
US, Arizona, Phoenix|Other
Intel
Global Operations Supply Chain Engineer - Oregon
US, Oregon, Hillsboro|Other
Intel
DFT Engineer
India, Bangalore|DFT
Intel
Manufacturing Quality and Reliability Engineer
PRC, Chengdu|Other
Intel
Hybrid FPGA SW developer
India, Bangalore|FPGA
Intel
Technical Program Manager
India, Bangalore|Other
Intel
Module Engineer (Contract)
Malaysia, Penang|Other
Intel
Graduate Talent (Operations Research Engineer)
Malaysia, Penang|Other
Intel
Intel Foundry Senior Customer Quality Engineer
Malaysia, Penang|Other
Intel
Yield Development Engineering Manager-Strategic Programs
US, Oregon, Hillsboro|Analog/MS
Intel
SAP MM/PP Business Systems Analyst
4 Locations|Other
Intel
WPM C4 IR Module Engineer
Ireland, Leixlip|Other
Intel
AI/ML Technologist
India, Bangalore|Other
Intel
Pre-si Verification Engineer
India, Bangalore|Verification
Intel
Silicon Packaging Design Engineer
2 Locations|Other
Intel
EHS Engineer
2 Locations|Other
Intel
Graduate Talent (Server Infrastructure and Test Engineer)
Malaysia, Kulim|Other
Intel
Material Supply Chain Technical Analyst
Malaysia, Penang|Other
Intel
Software Development Intern (Automation and AI Enablement)
Mexico, Guadalajara|Other
Intel
AMHS Equipment Technician
Malaysia, Kulim|Other
Intel
Accountant
Malaysia, Penang|Other
Intel
Senior Physical Design Engineer (CPU)
US, Oregon, Hillsboro|Physical Design
Intel
Logistics Operations Manager
Ireland, Leixlip|Other
Intel
Materials Program Manager, MPM, Spare and Indirect Material
Malaysia, Penang|Other
Intel
Senior Spare Program Manager
Malaysia, Penang|Other
Intel
Sr Supply Chain Operational Lead
Malaysia, Penang|Other
Intel
Graduate Talent (ISCP SoC Front End Team)
Malaysia, Penang|SoC
Intel
EHS Engineer
Vietnam, Ho_Chi_Minh_City|Other
Intel
Formal Verification Engineer
India, Bangalore|Verification
Intel
Supply Chain Engineer
US, New Mexico, Albuquerque|Other
Intel
Pre Silicon Verification Engineer
Virtual Canada|Verification
Intel
Program Manager - Sales Excellence
India, Bangalore|Other
Intel
Package and PCB Layout Engineer
Israel, Haifa|Other
Intel
Senior Staff EDA Tools Hardware Engineer
Malaysia, Penang|CAD/EDA
Intel
E-Core (Atom) CPU Layout Design Engineer
Malaysia, Penang|Other
Intel
Mfg Systems Software Development Engineer
US, Oregon, Hillsboro|Other
Intel
Development Tools Software Intern
Mexico, Guadalajara|Other
Intel
Automation Software Development Integration Engineer
US, Arizona, Phoenix|Other
Intel
Project Controls Engineer (Contract)
Malaysia, Penang|Other
Intel
Systems and Hardware Enabling Engineer
US, Oregon, Hillsboro|Other
Intel
Materials Program Manager (Temporary position)
Mexico, Guadalajara|Other
Intel
Sr. Data Center Facilities Engineer
US, California, Santa Clara|Other
Intel
Process Integration and Yield Technician
US, Arizona, Phoenix|Other
Intel
Advanced Packaging Dry Etch Module Development Engineer
US, Oregon, Hillsboro|Other
Intel
Ocotillo Technology Fabrication Senior Lithography Reticle Engineer
US, Arizona, Phoenix|Other
Intel
Senior Standard Cell and IP Application Engineer
India, Bangalore|Other
Intel
Director of Data Governance and Operations
3 Locations|Other
Intel
Advanced Packaging Lithography Development Manager
US, Oregon, Hillsboro|Other
Intel
EHS Environmental Engineer
US, Oregon, Hillsboro|Other
Intel
Assembly and Test NPI Technical Program Manager
Malaysia, Kulim|Other
Intel
Graduate Talent (Analog Layout Engineer)
2 Locations|Analog/MS
Intel
Assembly Equipment Specialist
Vietnam, Ho_Chi_Minh_City|Other
Intel
site service specialist
PRC, Chengdu|Other
Intel
EDA Tools Engineer
Malaysia, Penang|CAD/EDA
Intel
Server Quality and Reliability Intern
Costa Rica, San Jose|Other
Intel
Electrical Validation Intern
Mexico, Guadalajara|Other
Intel
Connectivity Systems Validation Engineer
India, Bangalore|Other
Intel
Design Verification Architect
2 Locations|Verification
Intel
Edge / Physical AI Business Development Manager
Taiwan, Taipei|Other
Intel
EDA Tools Hardware Engineer
Israel, Haifa|CAD/EDA
Intel
CPU DFT Manager
India, Bangalore|DFT
Intel
Senior Facilities Electrical Engineer
Malaysia, Penang|Other
Intel
Senior Design Verification Engineer
India, Bangalore|Verification
Intel
Pre-si Verification Engineer
India, Bangalore|Verification
Intel
Sr. Principal Engineer, Photonics Solutions
Virtual US|Other
Intel
Director, Process Engineer – Dry Etch
2 Locations|Other
Intel
Advanced Packaging Process Integration Engineer
US, New Mexico, Albuquerque|Other
Intel
Thermal Quality and Reliability Engineer
US, Arizona, Phoenix|Other
Intel
Investor Relations Specialist
3 Locations|Other
Intel
WATD Module Development Engineer
US, Oregon, Hillsboro|Other
Intel
Datacenter Technical Sales Specialist - Pacific Northwest
Virtual US|Other
Intel
Account Manager Fab Equipment Sourcing
2 Locations|Other
Intel
Analog Mixed-Signal Design Engineer
2 Locations|Analog/MS
Intel
Package Failure Analysis Engineer
US, Arizona, Phoenix|Other
Intel
Package Failure Analysis Engineer
US, Arizona, Phoenix|Other
Intel
TFSM IR EHS Safety and Industrial Hygiene Engineer
Ireland, Leixlip|Other
Intel
Enterprise Architecture Analytics Lead
2 Locations|Other
Intel
Module Equipment Technician (Contract)
2 Locations|Other
Intel
TFSM IR EHS Environmental Engineer
Ireland, Leixlip|Other
Intel
AI Software Engineering Intern
Poland, Gdansk|Other
Intel
Process and Equipment Engineer
Malaysia, Penang|Other
Intel
Graduate Talent (PQE PTE PFA)
Malaysia, Penang|Other
Intel
Advanced Wafer/Package Assembly Development Integrator
US, New Mexico, Albuquerque|Other
Intel
Manufacturing Operator
Malaysia, Penang|Other
Intel
Facilities Chemical/Gas System Engineer
US, New Mexico, Albuquerque|Other
Intel
Power Management Firmware Architect
2 Locations|Embedded
Intel
Power Management Firmware Development Team lead
Israel, Haifa|Embedded
Intel
Global Consumer GTM Program Manager, Retail Edge Program, Advocacy, and Enablement
4 Locations|Other
Intel
Firmware Development Engineer
US, California, Santa Clara|Embedded
Intel
ASIC and Custom Silicon Sr. Sales Account Manager - Americas region
US, California, Santa Clara|Other
Intel
ASIC and Custom Silicon Sales Account Manager - Americas region
US, California, Santa Clara|Other
Intel
Account Executive, Detroit + Greater Michigan
Virtual US|Other
Intel
Construction Tool Install Engineer
Ireland, Leixlip|Other
Intel
Cross Module Support (CMS) Technician-Shift 6 (night shift)
US, Oregon, Hillsboro|Other
Intel
Pre-Silicon IP System Validation Intern
Malaysia, Penang|Other
Intel
Pre-Silicon IP System Validation Intern
Malaysia, Penang|Other
Intel
Graduate Talent (Technical Writer)
Malaysia, Penang|Other
Intel
Process and Equipment Engineer
Malaysia, Kulim|Other
Intel
Process and Equipment Engineer
Malaysia, Kulim|Other
Intel
ASIC and Custom Silicon Sales Account Manager for Asia Pacific & Japan (APJ)
2 Locations|Other
Intel
Supply Chain Material Program Manager
Malaysia, Penang|Other
Intel
HR Director, Frontend Technology
3 Locations|Other
Intel
Ocotillo Technology Fabrication Litho Resist Track Module Engineer
US, Arizona, Phoenix|Other
Intel
Wafer Sort Module Engineer
US, New Mexico, Albuquerque|Other
Intel
Senior Process Integration Development Engineer
3 Locations|Other
Intel
New Mexico WPM Manufacturing Technician Internship
US, New Mexico, Albuquerque|Other
Intel
Hardware Electrical Validation Engineer
US, Oregon, Hillsboro|Other
Intel
Electrical Validation Technician
US, Oregon, Hillsboro|Other
Intel
Packaging Module Development Engineer
US, Arizona, Phoenix|Other
Intel
IP Design Verification Engineer
US, California, Folsom|Verification
Intel
Supply Chain Intern - Engineering and Research and Development Services (m/f/d)
Germany, Munich|Other
Intel
Semiconductor Manufacturing Engineer
Malaysia, Penang|Other
Intel
Analog Circuit Design Engineer
India, Bangalore|Analog/MS
Intel
Manufacturing Systems Software Development Engineer
Malaysia, Kulim|Other
Intel
Module Equipment Technician
Malaysia, Kulim|Other
Intel
Module Equipment Technician (Contract)
Malaysia, Kulim|Other
Intel
ASIC and Custom Silicon Sales Account Manager for PRC
3 Locations|Other
Intel
Information Security Network / Proxy Engineer
US, California, Folsom|Other
Intel
Mixed Signal Design Verification Engineer
India, Bangalore|Verification
Intel
Mixed Signal Logic Design Engineer
India, Bangalore|RTL Design
Intel
ASIC and Custom Silicon Sales Account Manager for Asia Pacific & Japan (APJ)
2 Locations|Other
Intel
Equipment Development Engineer
Japan, Tokyo|Other
Intel
Ethernet Hardware Engineer
Malaysia, Kulim|Other
Intel
Graduate Talent (CPU-SoC Silicon Design)
2 Locations|SoC
Intel
Director, Silicon Design Engineering
3 Locations|Other
Intel
System Validation Intern (Power and Performance)
Mexico, Guadalajara|Other
Intel
Physical Design Engineer
Mexico, Guadalajara|Physical Design
Intel
LTD RET Software Research Engineer/Scientist
US, Oregon, Hillsboro|Other
Intel
APTM NPI Integrator
US, Oregon, Hillsboro|Other
Intel
Microsoft Account Executive Admin - Seattle, WA
Virtual US|Other
Intel
Mixed Signal Logic Design Engineer
4 Locations|RTL Design
Intel
Analog Circuit Design Engineer
3 Locations|Analog/MS
Intel
HBI Module Development Engineer
US, Oregon, Hillsboro|Other
Intel
Data Science Student for AI Solutions Group
2 Locations|Other
Intel
Process Integration Development Engineer
US, Oregon, Hillsboro|Other
Intel
Firmware Solutions Engineer
US, Oregon, Hillsboro|Embedded
Intel
Process Integration Development Engineer
US, Oregon, Hillsboro|Other
Intel
Ethernet Customer Program Manager
2 Locations|Other
Intel
APTM Yield Analysis/Device Engineer
US, New Mexico, Albuquerque|Other
Intel
Silicon/Electrical Validation Engineer
2 Locations|Other
Intel
Senior Power and Performance Engineer
US, California, Santa Clara|Other
Intel
Lab Engineering Technician
US, California, Santa Clara|Other
Intel
Power Instrumentation Engineer
US, California, Santa Clara|Other
Intel
Employment Counsel
Ireland, Leixlip|Other
Intel
Haifa Lab technician - Student
Israel, Haifa|Other
Intel
Mixed Signal IP Verification Engineer
India, Bangalore|Verification
Intel
Senior Analog Layout Design Engineer
India, Bangalore|Analog/MS
Intel
Analog Circuit Design Engineer
Malaysia, Penang|Analog/MS
Intel
SOC Design Verification Engineer
India, Bangalore|Verification
Intel
ASIC and Custom Silicon Sales Account Manager for EMEA
Virtual United Kingdom|Other
Intel
Assembly Media and Collaterals Development Engineer
Malaysia, Kulim|Other
Intel
Manufacturing Operator (Contract)
Malaysia, Kulim|Other
Intel
Software Development Engineer
2 Locations|Other
Intel
Statistician
Malaysia, Kulim|Other
Intel
Senior Module Development Engineer
Malaysia, Kulim|Other
Intel
Senior EDA Tools Software Engineer
Virtual India|CAD/EDA
Intel
Packaging Module Development Engineer
Malaysia, Kulim|Other
Intel
CES Capital Coordinator
Malaysia, Penang|Other
Intel
Advanced Packaging Reliability Lab Engineer
US, Arizona, Phoenix|Other
Intel
EHS Engineer
US, Arizona, Phoenix|Other
Intel
CPU Pre-Silicon Verification Engineer
US, California, Folsom|Verification
Intel
EHS Engineer
US, Oregon, Hillsboro|Other
Intel
Experienced IP Logic Design Engineer
Costa Rica, San Jose|RTL Design
Intel
Payroll Business Analyst - Intel Contract Employee
2 Locations|Other
Intel
Substrates Quality and Reliability Engineer
3 Locations|Other
Intel
Global Industrial Hygiene Program Owner
4 Locations|Other
Intel
Software Application Development Engineer
India, Bangalore|Other
Intel
MPE Product Development Engineer Intern
Vietnam, Ho_Chi_Minh_City|Other
Intel
Manufacturing Operation Manager
Malaysia, Penang|Other
Intel
Senior USB IP Design Verification Engineer
2 Locations|Verification
Intel
Manufacturing Systems Software Development Engineer
Malaysia, Kulim|Other
Intel
CUF TD Module Engineer
Malaysia, Kulim|Other
Intel
Physical Design Engineer
Malaysia, Penang|Physical Design
Intel
Principal Engineer - Standard Cell Design
5 Locations|Other
Intel
Intel Foundry Process Integration and Yield Technician - Metrology
US, Oregon, Hillsboro|Other
Intel
Intel Foundry Process Integration and Yield Technician - Metrology
US, Oregon, Hillsboro|Other
Intel
Software Technician
US, Arizona, Phoenix|Other
Intel
Senior Software Engineer
US, Arizona, Phoenix|Other
Intel
Ocotillo Technology Fabrication Wet Etch Module Equipment Technician
US, Arizona, Phoenix|Other
Intel
Ocotillo Technology Fabrication Wet Etch Module Engineer
US, Arizona, Phoenix|Other
Intel
Manufacturing Operations Manager Shift 6 – Advanced Packaging
US, Arizona, Phoenix|Other
Intel
Module Development Defect Inspection Engineer
US, Oregon, Hillsboro|Other
Intel
Sales Engineer - Dallas, TX
Virtual US|Other
Intel
Senior Pre-Silicon Verification Engineer
Virtual Canada|Verification
Intel
OTF IFA AMHS Equipment Technician
US, Arizona, Phoenix|Other
Intel
Sales Account Manager - Team Oracle
2 Locations|Other
Intel
AI Framework Engineer
Poland, Gdansk|Other
Intel
Japan Industry Technical Sales
Japan, Tokyo|Other
Intel
Principal Engineer, AMS IP Architecture
5 Locations|Analog/MS
Intel
Engineering Compute Operations Engineer
India, Bangalore|Other
Intel
Senior Program Managers
Japan, Tokyo|Other
Intel
Product Quality Engineer
Vietnam, Ho_Chi_Minh_City|Other
Intel
Manufacturing Systems Engineer
Malaysia, Penang|Other
Intel
Physical Design Intern
Vietnam, Ho_Chi_Minh_City|Physical Design
Intel
Physical Design Intern
Vietnam, Ho_Chi_Minh_City|Physical Design
Intel
STA (Static Timing Analysis) Design Intern
Vietnam, Ho_Chi_Minh_City|Other
Intel
Facilities Electrical Engineer
Malaysia, Penang|Other
Intel
Substrate Packaging Research and Development Engineer
US, Arizona, Phoenix|Other
Intel
Foundry Solutions Business Development
3 Locations|Other
Intel
Software Engineer
2 Locations|Other
Intel
Advanced Packaging Technology Development Process Integration Engineer
US, New Mexico, Albuquerque|Other
Intel
Lab Engineering Technician
US, Arizona, Phoenix|Other
Intel
Materials Program Manager
3 Locations|Other
Intel
Advanced Packaging Process Integration Engineer
US, New Mexico, Albuquerque|Other
Intel
Technical Analyst Intern
Costa Rica, San Jose|Other
Intel
Yield Development Engineer
US, Oregon, Hillsboro|Other
Intel
Product Quality and Reliability Engineer
India, Bangalore|Other
Intel
SoC Power Management Architect
India, Bangalore|SoC
Intel
Mechanical Design Engineer
India, Bangalore|Other
Intel
Process Integration and Yield Technician ( Contract )
Malaysia, Penang|Other
Intel
Business Development Specialist
Taiwan, Taipei|Other
Intel
Signal Integrity Engineer
US, Oregon, Hillsboro|Other
Intel
Network Systems and Solutions Engineer
US, Oregon, Hillsboro|Other
Intel
Mixed Signal IP Verification Engineer
India, Bangalore|Verification
Intel
MBA Internship – Ecosystem Development Specialist
3 Locations|Other
Intel
Junior Physical Design Engineer (CPU)
US, Oregon, Hillsboro|Physical Design
Intel
Mixed Signal Design Verification Engineer
US, Oregon, Hillsboro|Verification
Intel
Ocotillo Technology Fabrication Production Line Coordinator
US, Arizona, Phoenix|Other