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About This Role
- The Role and Impact As an IP Design Verification Engineer, you will play a key role in ensuring the functionality and performance of Intel's cutting-edge intellectual property (IP) designs for system-on-chip (SoC) applications.
- You will be directly contributing to the next-generation LPDDR5 and DDR5 PHY verification efforts on Intel's leading process nodes.
- By joining our dynamic and innovative team, you will have the unique opportunity to shape the development of groundbreaking technologies that drive the future of computing.
- Your work will involve collaborating with architects, RTL developers, and physical design teams to validate complex architectural and microarchitectural features.
- Through your expertise, you will ensure the robustness of Intel's IP designs, delivering critical contributions to the broader goals of Intel's success.
- Key Responsibilities : Own RTL validation for functional and/or DFx (design for test/debug).
- Develop OVM/UVM-based test benches as a platform for RTL validation.
- Define verification strategies, methodologies, and detailed test plans for effective RTL validation.
- Create Bus Functional Models (BFM) to interface with the IP, monitor transactions, and verify protocol compliance.
- Implement and execute test cases, assertions, and functional coverage using SystemVerilog, ensuring alignment with verification plans.
- Set up and perform gate-level simulations (GLS) to verify asynchronous and multi-cycle paths.
- Debug test failures in RTL and GLS environments, identifying root causes and implementing corrective measures.
- Analyze functional and code coverage metrics to identify gaps and achieve full verification coverage.
- Automate pre-silicon validation flows by creating tools or scripts, leveraging programming languages such as Tcl, Tk, Perl, or Python.
- Collaborate with system and SoC teams on IP integration, ensuring smooth integration and resolving all related issues.
- Maintain and enhance verification methodologies, contributing to the improvement of validation infrastructure.
Requirements
- Bachelor's or advanced degree in Electrical Engineering, Computer Engineering, or a related discipline. 6+ years of experience with a Bachelor's degree, 4+ years with a Master's degree, or 2+ years with a PhD.
- Strong proficiency in SystemVerilog and verification methodologies such as OVM and UVM.
- Expertise in DDR protocols, particularly LPDDR5 and DDR5, with experiences covering all stages of validation from specifications to coverage.
- Skilled in RTL validation, logic design, DFx concepts, and IP microarchitecture debug methodologies.
- Experience with industry-standard verification tools such as VCS, DVE, Verdi, or similar tools.
- Familiarity with UNIX environments and fluency in shell scripting and C programming.
Nice to Have
- Proven experience in IP validation across multiple full project lifecycles.
- Advanced problem-solving skills with the ability to debug simulation failures and resolve formal verification challenges.
- Proficiency in automating verification processes using Tcl, Tk, Perl, and Python to improve efficiency and scalability.
- Strong oral and written communication skills, with the ability to work effectively with cross-functional teams and global partners.
- Join us in pushing the boundaries of technology and innovation.
- Your contributions will help shape the future of computing at Intel.
- Apply today and become a part of our journey to create world-changing technologies.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
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Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
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784 positions
Job ID
/job/Malaysia-Penang/IP-Design-Verification-Engineer_JR0283659-1
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