SOC Physical Design Engineer

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About This Role

  • The Role and Impact As a SOC Physical Design Engineer, you will play a pivotal role in shaping Intel's cutting-edge designs and driving innovation in advanced technology nodes.
  • You will be instrumental in delivering complex blocks and subsystems from RTL to GDSII, ensuring high-performance, low-power solutions that power Intel's next-generation platforms.
  • This role offers you the opportunity to contribute to the design and optimization of silicon products that define Intel's leadership in the semiconductor industry.
  • Your work will directly impact the success of Intel's products, enabling world-class performance, efficiency, and scalability.
  • Key Responsibilities - Perform Logic Synthesis, Floor-planning, Placement and Routing, Timing Analysis, and Optimization for complex designs spanning 2-3 million instances. - Ensure seamless integration and delivery of blocks or subsystems to the SOC level, achieving DRC/LVS clean-up and meeting stringent quality standards. - Conduct IR/EM analysis, formal verification, and convergence for high-performance designs operating at frequencies close to 2GHz and within lower technology nodes (7nm or below). - Utilize industry-leading EDA tools from Synopsys or Cadence, including DC, ICC2/Fusion/Innovus, Primetime, Calibre/ICV, and Conformal/Formality. - Implement efficient Clock Tree Synthesis (CTS) strategies tailored to design-specific requirements. - Develop and execute scripts to automate design flows and optimize processes, ensuring disciplined execution and efficient project timelines. - Proactively debug design issues, collaborate with cross-functional teams, and drive technical solutions to closure. - Adapt to dynamic changes in RTL and design requirements while maintaining professionalism and teamwork.

Requirements

  • Bachelor's degree in Electrical Engineering, Electronics Engineering, VLSI Design, or related fields. - 8+ years of experience with a Bachelor's degree, 6+ years with a Master's degree, or 4+ years with a PhD in physical design for advanced technology nodes. - Demonstrated expertise in RTL-to-GDSII design implementation, including PnR, CTS strategies, IR/EM analysis, and DRC/LVS sign-off. - Proficiency in using Synopsys and Cadence tool suites for physical design tasks. - Strong scripting skills for automation and optimization, including proficiency in Python, TCL, or Perl. - Hands-on experience with high-speed, low-power designs at subsystem or chip level.
  • Preferred Qualifications - Excellent problem-solving skills, data analysis capabilities, and the ability to debug complex design challenges effectively. - Strong communication skills and a collaborative mindset to thrive in a fast-paced, dynamic environment. - Experience in lower technology nodes and an understanding of design flows for emerging semiconductor technologies. - Proven ability to lead and mentor team members, fostering innovation and technical excellence in physical design. - Passion for driving impactful solutions and contributing to Intel's mission of advancing technology. - Full chip design implementation and integration is a strong plus We invite you to join Intel's team of innovators to redefine what's possible and create products that power a smarter future.
  • Apply today and be part of the journey.

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Intel

India, Bangalore

Specialisation
Salary range
₹5-11 LPA to ₹38-65 LPA
Open roles at Intel
649 positions
Job ID
/job/India-Bangalore/SOC-Physical-Design-Engineer_JR0285093

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