Verification Jobs in India

511 open verification positions at NVIDIA, Marvell Technology, Micron Technology, Analog Devices and more. Sourced directly from company career pages.

NVIDIA(152)Marvell Technology(79)Micron Technology(57)Analog Devices(50)Cadence Design Systems(48)NXP Semiconductors(47)
NVIDIA

Senior DFT Verification Engineer

India, Bengaluru|Verification
NXP Semiconductors

Principle Engineer - SoC Design Verification

Pune|Verification
NXP Semiconductors

Senior Hardware Verification Engineer

Hyderabad|Verification
NXP Semiconductors

Senior Principle Engineer - SoC Design Verification

Pune|Verification
NXP Semiconductors

Design Verification Engineer

Pune|Verification
NXP Semiconductors

Principal Design Verification Engineer

Pune|Verification
Marvell Technology

Staff Verification Engineer- PCIe/UALink/CXL

Bangalore|Verification
Marvell Technology

DE05T5 - Design Verification Principal Engineer

Bangalore|Verification
Marvell Technology

Principal Design Verification Engineer

Bangalore|Verification
Marvell Technology

Sr. Staff Physical Verification CAD engineer

Bangalore|Verification
Analog Devices

Senior Software Engineer, Embedded Algorithm Verification & Automation

India, Bangalore, Nova|Verification
Analog Devices

Principal Engineer, Design Verification

India, Bangalore, Nova|Verification
GlobalFoundries

Analog Mixed Signal - Design & Verification Engineer

IND - Karnataka - Bengaluru - North|Verification
GlobalFoundries

Analog Mixed-Signal Verification Engineer

IND - Karnataka - Bengaluru - North|Verification
GlobalFoundries

Design Verification Engineer – CPU Verification

IND - Karnataka - Bengaluru - North|Verification
Micron Technology

Senior Memory circuit design verification engineer

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Principal Engineer, Project Design Verification Lead

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Senior Memory Circuit Design Verification Engineer

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

SR ENGINEER, Design Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Lead Principal Engineer, Design Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

STAFF ENGINEER , Design Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Member Of Technical Staff TLP - HBM Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Senior Engineer - Memory Circuit Design Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Senior Memory Circuit Design Verification Engineer (E3)

Hyderabad - Phoenix Aquila, India|Verification
Broadcom

Senior ASIC DV Engineer

2 Locations|Verification
Broadcom

Verification Engineer

USA-CA San Jose Innovation Drive|Verification
Micron Technology

Senior Memory Circuit Design Verification Engineer

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Design and Verification Engineer, Pathfinding

3 Locations|Verification
Micron Technology

Engineer - IP Verification

Bengaluru, India|Verification
Micron Technology

Design Verification Engineer

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Staff Design Verification Engineer/Architect, HBM

Richardson, TX|Verification
Micron Technology

Sr/Staff Design Verification Engineer, HBM Verification Architecture

Richardson, TX|Verification
Micron Technology

Senior Design Verification Engineer, HBM

Richardson, TX|Verification
Micron Technology

Staff Design Verification Engineer, DRAM

Boise, ID - Main Site|Verification
Micron Technology

Senior Design Verification Engineer

Jalisco, Mexico|Verification
Micron Technology

SENIOR ANALOG/AMS VERIFICATION ENGINEER - HBM

Jalisco, Mexico|Verification
Micron Technology

SENIOR ANALOG/AMS VERIFICATION ENGINEER - HBM

Jalisco, Mexico|Verification
Micron Technology

ENGINEER - HBM VERIFICATION

Jalisco, Mexico|Verification
Intel

Senior CPU Pre-Silicon Verification Engineer

2 Locations|Verification
Intel

CPU Formal Verification Engineer

5 Locations|Verification
Intel

Senior Director, AI SOC Design Verification

US, California, Santa Clara|Verification
Intel

SoC/IP Design Verification Engineer

Mexico, Guadalajara|Verification
Intel

IP Design Verification Engineer

Israel, Petah-Tikva|Verification
Intel

Senior Verification Engineer

Virtual Canada|Verification
Intel

Senior CPU Verification Engineer

2 Locations|Verification
Intel

Senior Formal Verification Engineer – AI SoC Development

4 Locations|Verification
Intel

CPU Pre-Silicon Verification Engineer

Mexico, Guadalajara|Verification
Broadcom

Senior ASIC DV Engineer

2 Locations|Verification
NVIDIA

ASIC Verification Engineer - New College Grad 2026

3 Locations|Verification
NVIDIA

Senior Firmware Engineer -  Development, Verification and Infrastructure

US, CA, Santa Clara|Verification
NVIDIA

Senior Formal Verification Engineer

4 Locations|Verification
NVIDIA

ASIC Verification Engineer

US, TX, Austin|Verification
NVIDIA

Senior ASIC Verification Engineer

US, TX, Austin|Verification
NVIDIA

Senior Verification Engineer, Chip Design

Israel, Yokneam|Verification
NVIDIA

Senior Cell Modeling and Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Senior ASIC Verification Engineer

US, TX, Austin|Verification
NVIDIA

Senior Manager, Software Verification

2 Locations|Verification
NVIDIA

Senior IP Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU

US, CA, Santa Clara|Verification
NVIDIA

Senior Software Verification Engineer

2 Locations|Verification
NVIDIA

Senior Memory Controller Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Senior ASIC Verification Engineer

5 Locations|Verification
NVIDIA

Senior Software Verification Engineer

Israel, Yokneam|Verification
NVIDIA

Formal Verification Engineer

Israel, Yokneam|Verification
NVIDIA

Senior Verification Engineer, SoC

5 Locations|Verification
NVIDIA

Cell Modeling and Verification Engineer - New College Grad 2026

US, CA, Santa Clara|Verification
NVIDIA

Senior ASIC Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Senior Formal Verification Engineer - LPU

Canada, Remote|Verification
NVIDIA

Senior Formal Verification Engineer - LPU

5 Locations|Verification
NVIDIA

Senior Software Verification Engineer, Bluefield BMC

2 Locations|Verification
NVIDIA

Senior ASIC Design Verification Engineer - LPU

Canada, Remote|Verification
NVIDIA

Senior Mixed Signal Design Verification Engineer

2 Locations|Verification
NVIDIA

Chip Design Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

Senior FC Verification Engineer

Israel, Yokneam|Verification
NVIDIA

ASIC Clocks Verification Engineer - New College Grad 2026

US, CA, Santa Clara|Verification
NVIDIA

Senior DFT Verification Engineer

2 Locations|Verification
NVIDIA

Formal Verification Engineer - New College Grad 2026

2 Locations|Verification
NVIDIA

Senior Formal Verification Engineer

2 Locations|Verification
NVIDIA

SOC Verification Engineer

4 Locations|Verification
NVIDIA

Senior SOC Verification Engineer

4 Locations|Verification
NVIDIA

Senior ASIC Verification Engineer

3 Locations|Verification
NVIDIA

Senior ASIC Verification Engineer

2 Locations|Verification
Cadence Design Systems

Sr. Principal Functional Verification Engineer: Applied ML

BELO HORIZONTE|Verification
Cadence Design Systems

Senior Principal Functional Verification Engineer - Applied ML

PETAH TIKVA|Verification
Cadence Design Systems

Functional Verification Engineer - Applied ML

PETAH TIKVA|Verification
Cadence Design Systems

Application Engineering Director - IC Design Verification

SAN JOSE|Verification
Cadence Design Systems

Senior Principal Software Engineer - Accelerated Verification IP

SAN JOSE|Verification
Cadence Design Systems

Lead Product Engineer: System Verification and Emulation

BELO HORIZONTE|Verification
Cadence Design Systems

Lead Verification Engineer

2 Locations|Verification
Cadence Design Systems

Applied ML – Functional Verification Engineer

SAN JOSE|Verification
Cadence Design Systems

Applied ML – Functional Verification Engineer

SAN JOSE|Verification
Cadence Design Systems

Lead Design Engineer - Verification

SHANGHAI|Verification
Cadence Design Systems

Lead Design Engineer - Verification

SHANGHAI|Verification
Cadence Design Systems

Principal Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Sr Principal Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Principal Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Lead Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Lead Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Lead Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Principal Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Product Engineer II - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Product Engineer II - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Product Engineer II - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Product Engineer II - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Lead Product Engineer - UCIe & Functional Verification

3 Locations|Verification
Cadence Design Systems

Lead Product Engineer - Design Verification (MM/VIP)

2 Locations|Verification
Marvell Technology

Senior Director of SoC Design Verification

US-CA - San Diego|Verification
Marvell Technology

Sr. Staff Verification Engineer

Santa Clara, CA|Verification
Marvell Technology

Sr. Staff Verification Engineer

Santa Clara, CA|Verification
Marvell Technology

Technical Lead, Design Verification

Santa Clara, CA|Verification
Marvell Technology

Sr. Staff Design Verification Engineer

Irvine, CA|Verification
Marvell Technology

Principal Design Verification Engineer

Irvine, CA|Verification
Marvell Technology

Senior / Staff Verification Engineer - RF/TIA (Analog Mixed Signal)

Singapore|Verification
Marvell Technology

Director, Design Verification

2 Locations|Verification
Marvell Technology

Senior Staff Digital Verification Engineer – Wireline PHYs

Toronto, Canada|Verification
Marvell Technology

Senior Principal Engineer, Design Verification

Ottawa, Canada|Verification
Marvell Technology

Design Verification (Senior to Senior Staff Engineer)

Ho Chi Minh|Verification
Marvell Technology

Principal Engineer, Verification

Santa Clara, CA|Verification
Marvell Technology

Design Verification Engineer, Principal

Santa Clara, CA|Verification
Marvell Technology

Design Verification, Senior to Senior Staff

Ho Chi Minh|Verification
Marvell Technology

Design/DSP/Verification Intern - PhD Degree

Santa Clara, CA|Verification
Marvell Technology

Analog Modeling/Verification Senior Staff Engineer

2 Locations|Verification
Marvell Technology

Staff Design Verification Engineer

Toronto, Canada|Verification
Marvell Technology

Design Verification Senior Staff Engineer

IL - Petah Tikva|Verification
Marvell Technology

Principle Verification Engineer

IL - Petah Tikva|Verification
Marvell Technology

Design Verification, Manager

Ho Chi Minh|Verification
Marvell Technology

Senior Design Verification engineer

2 Locations|Verification
Marvell Technology

Design Verification Senior to Staff Engineer

2 Locations|Verification
Marvell Technology

Senior Staff RTL Design /Verification

2 Locations|Verification
NVIDIA

Senior Verification Engineer - HSIO Cluster and SOC

2 Locations|Verification
NVIDIA

Senior Verification Engineer - HSIO Cluster and SOC

2 Locations|Verification
NVIDIA

Senior Verification Engineer - ARM Fabric Unit Level

2 Locations|Verification
NVIDIA

Senior Verification Engineer - Audio and Auxiliary CPU Sub-Systems

2 Locations|Verification
Analog Devices

Principal Engineer, Design Verification Engineering

Ireland, Dublin|Verification
Analog Devices

Principal Engineer, Design Verification

US, NC, Durham|Verification
Analog Devices

ASIC Design and Verification Engineer - AI

2 Locations|Verification
Analog Devices

Staff Digital Verification Engineer

Turkey, Istanbul, Bilisim Vadisi|Verification
Analog Devices

Staff Engineer, Design verification

Italy, Milan, Assago|Verification
Analog Devices

Senior AMS Verification Engineer

US, MA, Wilmington|Verification
Analog Devices

Principal Engineer, Design Verification

3 Locations|Verification
GlobalFoundries

Principal Design Verification Engineer

Austin|Verification
Micron Technology

Design Verification Quality Engineer

Boise, ID - Main Site|Verification
Samsung Semiconductor

Senior Staff Engineer, Design Verification

San Jose, California, United States|Verification
Samsung Semiconductor

Staff Engineer, Design Verification

San Jose, California, United States|Verification
Broadcom

Senior Digital Mixed-Signal (DMS) Verification Engineer

USA-Mendota Heights-Northland|Verification
NVIDIA

BSP and BMC Verification Software Engineer

Israel, Yokneam|Verification
NVIDIA

Senior Chip Design Verification Engineer

2 Locations|Verification
NVIDIA

Senior Firmware PHY Verification Engineer

Israel, Tel Aviv|Verification
Cadence Design Systems

Lead Software Engineer ( Verification )

BANGALORE|Verification
Analog Devices

Senior Design Verification Engineer

US, TX, Dallas, Tollway|Verification
Micron Technology

Staff Design Verification Engineer, HBM

Richardson, TX|Verification
Broadcom

Design Verification Engineer

USA-CA San Jose Innovation Drive|Verification
NVIDIA

Senior Formal Verification Engineer - LPU

6 Locations|Verification
NVIDIA

Senior ASIC Verification Engineer - GPU

US, CA, Santa Clara|Verification
NVIDIA

Senior Software and DevOps Engineer, DOCA Verification

2 Locations|Verification
NVIDIA

Senior Software Engineer - Verification AI Infrastructure

Israel, Tel Hai|Verification
NVIDIA

Senior Design Verification Engineer - GPU Memory Subsystem

US, NC, Durham|Verification
NVIDIA

System Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Firmware SerDes Verification Engineer

Israel, Yokneam|Verification
Cadence Design Systems

Software Architect, Physical Verification

SAN JOSE|Verification
Cadence Design Systems

Principal Education Application Engineer- System Verification Expert

BANGALORE|Verification
Marvell Technology

Principal AMS verification engineer

Bangalore|Verification
Marvell Technology

Principal Verification Engineer

Santa Clara, CA|Verification
Micron Technology

Staff/Principal Engineer - Design Verification (SoC expert/lead)

San Jose, CA|Verification
Micron Technology

Engineer, DEG Mobile DRAM Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Senior Engineer - Design Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Staff Engineer - Design Verification

Hyderabad - Phoenix Aquila, India|Verification
NVIDIA

Senior Verification Engineer, Memory Subsystem

India, Bengaluru|Verification
Intel

Design Verification Student Worker

Mexico, Guadalajara|Verification
NVIDIA

ASIC Verification Engineer - New College Grad 2026

2 Locations|Verification
NVIDIA

Senior Formal Verification Engineer, GPU Kernels

US, CA, Santa Clara|Verification
NVIDIA

Formal Verification Engineer

Israel, Yokneam|Verification
NVIDIA

Formal Verification Engineer

Israel, Tel Aviv|Verification
Marvell Technology

Sr Staff Analog Modeling/Verification Engineer

San Diego, CA|Verification
Marvell Technology

Design Verification Engineer - Early Career

2 Locations|Verification
Micron Technology

Senior Engineer - HBM Circuit Verification

Hyderabad - Phoenix Aquila, India|Verification
NVIDIA

Formal Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

Formal Verification Engineer

2 Locations|Verification
NVIDIA

Senior Firmware Engineer - GPU Verification

US, CA, Santa Clara|Verification
NVIDIA

Formal Verification Engineer

Israel, Yokneam|Verification
NVIDIA

Senior Chip Design Engineer, Formal Verification

Israel, Tel Aviv|Verification
Cadence Design Systems

Mixed Signal Systems and Verification Engineer II

2 Locations|Verification
NXP Semiconductors

SoC Verification Lead Engineer

Bangalore|Verification
NXP Semiconductors

Sr./Lead FW Verification and Validation Engineer

Bangalore|Verification
Marvell Technology

Design Verification Senior Staff Engineer

Petah-Tikva|Verification
Marvell Technology

Senior Staff Verification Engineer

Pune|Verification
Marvell Technology

Design Verification Engineer

2 Locations|Verification
Micron Technology

Principal Engineer - IP Design Verification

Hyderabad - Phoenix Aquila, India|Verification
NXP Semiconductors

Principal Design Verification Engineer

Bangalore|Verification
Micron Technology

SMTS Design Verification Engineer

5 Locations|Verification
NVIDIA

Formal Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

Senior Chip Design Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

ASIC Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Formal Verification Engineer

2 Locations|Verification
NVIDIA

Senior ASIC Verification Engineer, Coherent High Speed Interconnect

4 Locations|Verification
Cadence Design Systems

Application Engineer Manager – Formal Verification and Functional Simulation

BELO HORIZONTE|Verification
NXP Semiconductors

Digital Verification Engineer

Glasgow|Verification
Marvell Technology

Director of SoC Design Verification

San Diego, CA|Verification
Marvell Technology

Sr Staff SoC Design Verification Manager

San Diego, CA|Verification
Marvell Technology

Sr Principal SoC Verification Engineer

San Diego, CA|Verification
Marvell Technology

Sr Staff SoC Verification Engineer

San Diego, CA|Verification
Marvell Technology

Principal SoC Verification

San Diego, CA|Verification
Marvell Technology

Senior SoC Design Verification Manager

San Diego, CA|Verification
Marvell Technology

Staff SoC Verification Engineer

San Diego, CA|Verification
Marvell Technology

Distinguished Engineer - SoC Verification

San Diego, CA|Verification
Marvell Technology

Principal Design Verification Engineer

2 Locations|Verification
Micron Technology

Sr. Design Verification Engineer

Minneapolis, MN|Verification
NVIDIA

Senior Performance Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Firmware PHY Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

Senior ASIC Verification Engineer

US, CA, Santa Clara|Verification
Micron Technology

Sr Design Verification Engineer/Architect, HBM

Richardson, TX|Verification
Intel

Mixed Signal Design Verification Engineer

India, Bangalore|Verification
Intel

IP Design Verification Engineer

Malaysia, Penang|Verification
NVIDIA

Senior ASIC Verification Engineer, Coherent High Speed Interconnect

Canada, Toronto|Verification
NVIDIA

Software Verification Manager, SDK

Israel, Yokneam|Verification
NVIDIA

Chip Design & Verification Engineer

Israel, Yokneam|Verification
NXP Semiconductors

IC Design Verification Engineer

Kanata|Verification
NXP Semiconductors

Software Engineer - Hardware Design Verification

Kanata|Verification
Marvell Technology

Sr. Principal Design Verification Engineer (PCIe/ CXL}

Bangalore|Verification
Marvell Technology

Senior Staff Physical Verification CAD engineer

Santa Clara, CA|Verification
Analog Devices

Mixed Signal Verification Engineer

United Kingdom, Edinburgh, SC, Freer|Verification
Analog Devices

Staff Engineer, Design Verification Engineering

US, AZ, Chandler, East Elliot|Verification
NVIDIA

Senior Chip Design Verification Engineer

2 Locations|Verification
NVIDIA

Senior Chip Design Verification Engineer

Israel, Tel Aviv|Verification
Marvell Technology

Design Verification Senior Staff Engineer

Hyderabad|Verification
Marvell Technology

Principal Engineer - Design Verification

Hyderabad|Verification
NXP Semiconductors

Principal SOC Verification Engineer

Noida|Verification
NXP Semiconductors

Principal Engineer - IP Verification

Noida|Verification
Broadcom

Verification Engineer

2 Locations|Verification
NVIDIA

Senior Software Verification Engineer

2 Locations|Verification
NVIDIA

Senior Chip Design and Formal Verification Engineer

2 Locations|Verification
NVIDIA

Senior Memory Controller Verification Engineer

Canada, Toronto|Verification
NVIDIA

Senior ASIC Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Senior Verification Engineer

India, Bengaluru|Verification
NVIDIA

Senior Chip Design Engineer, Formal Verification

Israel, Tel Aviv|Verification
Marvell Technology

Sr. Staff Engineer, ASIC Verification - AI/HPC SOCs

3 Locations|Verification
Marvell Technology

Principal Engineer, Design Verification

2 Locations|Verification
Analog Devices

Senior Digital Verification Engineer

Singapore, Kallang|Verification
Analog Devices

Digital Verification Lead

Singapore, Kallang|Verification
Analog Devices

Staff Digital Verification Engineer

Singapore, Kallang|Verification
Analog Devices

Senior Physical verification

CLOSED-India, Bangalore, Aveda Meta|Verification
Analog Devices

Staff Design Verification Engineer

CLOSED-India, Bangalore, Aveda Meta|Verification
Analog Devices

Manager, Design Verification

CLOSED-India, Bangalore, Aveda Meta|Verification
Analog Devices

Staff DV Engineer

CLOSED-India, Bangalore, Aveda Meta|Verification
GlobalFoundries

MTS Digital Verification Engineer

Egypt|Verification
Micron Technology

Senior Engineer - Verification Enablement, Test Structure Design and Layout

Jalisco, Mexico|Verification
NXP Semiconductors

Principal Engineer - IP Verification

Noida|Verification
Marvell Technology

Senior Staff Engineer - AMS IP Verification

Bangalore|Verification
NVIDIA

Senior Software Release Manager – Networking Verification Engineer

2 Locations|Verification
Cadence Design Systems

Lead Digital Verification Engineer

2 Locations|Verification
Marvell Technology

Digital IC Design/Verification Engineer

Cordoba, Argentina|Verification
Marvell Technology

Director, Design Verification

Santa Clara, CA|Verification
Analog Devices

Senior Engineer, Design Verification Engineering

US, TX, Dallas, Tollway|Verification
Analog Devices

Senior Engineer Design Verification Engineering

US, OR, Beaverton|Verification
Analog Devices

Staff Engineer, Design Verification Engineer

United Kingdom, Edinburgh, SC, Freer|Verification
Samsung Semiconductor

Director, Design Verification

San Jose, California, United States|Verification
NVIDIA

Formal Verification Engineer

India, Bengaluru|Verification
NVIDIA

Senior Chip Design Verification Engineer

2 Locations|Verification
NVIDIA

Network and System Verification Engineer, E2E

Israel, Yokneam|Verification
Micron Technology

MTS-RTL Verification Engineer

Bengaluru, India|Verification
Samsung Semiconductor

Staff Engineer, ASIC Design Verification

San Jose, California, United States|Verification
Intel

IP Design verification Engineer

India, Bangalore|Verification
Intel

Physical Verification Engineer

3 Locations|Verification
NVIDIA

Senior ASIC Design Verification Engineer

US, CA, Santa Clara|Verification
NVIDIA

Manager, Formal Verification

China, Shanghai|Verification
Marvell Technology

Senior Staff Engineer - Design Verification - Ethernet

Pune|Verification
Marvell Technology

Principal Design Verification Engineer

Santa Clara, CA|Verification
Marvell Technology

Senior Staff Design Verification Engineer

Toronto, Canada|Verification
Marvell Technology

Senior Staff Design Verification Engineer – PCIE/CXL Sub-System

2 Locations|Verification
Marvell Technology

Senior Staff Design Verification Engineer – Memory Sub-System (LPDDR/DDR/HBM )

Santa Clara, CA|Verification
Marvell Technology

Senior Staff Design Verification Engineer – Memory Sub-System

Santa Clara, CA|Verification
Marvell Technology

Digital Design Verification Intern

Cordoba, Argentina|Verification
Analog Devices

Senior Software Verification Engineer, Datacenter Software

Spain, Valencia, Cortes Valencianas|Verification
Analog Devices

Staff Design Verification Engineer (AI/ML)

2 Locations|Verification
GlobalFoundries

Design Engineer Verification (2026 New College Graduate)

Richardson|Verification
GlobalFoundries

SoC Design Verification Engineer

Richardson|Verification
GlobalFoundries

SoC Design Verification Engineer

Richardson|Verification
Micron Technology

MTS, DEG Design Verification

Boise, ID - Main Site|Verification
Micron Technology

Design Verification Engineer

Boise, ID - Main Site|Verification
Micron Technology

Principal Analog and Reliability Verification Engineer

Boise, ID - Main Site|Verification
Micron Technology

Principal Design Verification Quality Engineer

Boise, ID - Main Site|Verification
Micron Technology

SOC Formal Verification Engineer, HBM

Richardson, TX|Verification
Micron Technology

Principal AMS Verification Engineer

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Senior Engineer IP Verification - AMS Verification

Bengaluru, India|Verification
Micron Technology

Senior ASIC Design Verification Engineer

Minneapolis, MN|Verification
Micron Technology

Senior ASIC Design Verification Engineer

Minneapolis, MN|Verification
Intel

Senior CPU Pre-Si Verification Engineer

Mexico, Guadalajara|Verification
Analog Devices

Staff Engineer, Design Verification Engineering

India, Bangalore, RMZ|Verification
GlobalFoundries

Principal SoC Design Verification Engineer

Richardson|Verification
Micron Technology

Senior Engineer - ASIC Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Staff/Principal Engineer - ASIC Verification

2 Locations|Verification
Cadence Design Systems

Lead Application Engineer – Digital Verification

HO CHI MINH CITY 02|Verification
Cadence Design Systems

Lead Application Engineer – Digital Verification

HO CHI MINH CITY 02|Verification
Cadence Design Systems

Sr Principal Verification Engineer

SHANGHAI|Verification
Marvell Technology

Senior Staff Firmware Engineer - design, verification, and, validation, integration of high speed optical components.

Westlake Village, CA|Verification
Analog Devices

Principal Physical verification Engineer

India, Bangalore, RMZ|Verification
Analog Devices

Staff Design Verification Engineer

India, Bangalore, RMZ|Verification
Analog Devices

Staff Design Verification Engineer

India, Bangalore, RMZ|Verification
Analog Devices

Staff Design Verification Engineer

India, Bangalore, RMZ|Verification
Analog Devices

Staff Engineer – SoC Design Verification

India, Bangalore, RMZ|Verification
Analog Devices

Staff Engineer, Design Verification Engineering

India, Bangalore, RMZ|Verification
Analog Devices

Staff Physical Verification Engineer

India, Bangalore, RMZ|Verification
Analog Devices

Senior Software Verification Engineer, Datacenter Software

Spain, Valencia, Cortes Valencianas|Verification
GlobalFoundries

Sr Principal Verification Engineer

2 Locations|Verification
GlobalFoundries

Sr Principal CPU Verification Engineer

Austin|Verification
GlobalFoundries

Sr Principal Engineer CPU Verification

Austin|Verification
GlobalFoundries

Principal Design Verification Engineer

3 Locations|Verification
NVIDIA

Senior Chip Design Verification Engineer, Port IP Group

Israel, Tel Aviv|Verification
NVIDIA

Verification Engineer

India, Bengaluru|Verification
Marvell Technology

Director of Design Verification

2 Locations|Verification
NVIDIA

ASIC Verification Engineer - Clocks

India, Bengaluru|Verification
NVIDIA

Verification Engineer, Memory Subsystem

India, Bengaluru|Verification
NVIDIA

Senior SOC Verification Engineer - Networking

India, Bengaluru|Verification
NVIDIA

Verification Engineer - GPU Fullchip

India, Bengaluru|Verification
NXP Semiconductors

Senior Digital Verification Engineer

2 Locations|Verification
Analog Devices

Principal Design Verification Engineer

Spain, Valencia, Cortes Valencianas|Verification
Micron Technology

Staff Engineer - ASIC Test Controller Verification Lead

Hyderabad - Skyview, India|Verification
NVIDIA

Verification Engineer - GPU Fullchip

India, Bengaluru|Verification
Cadence Design Systems

Principal Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Cadence Design Systems

Lead Product Engineer - Verification

GYEONGGI-DO (Seoul)|Verification
Marvell Technology

Design Verification, Senior Staff Engineer

Ho Chi Minh|Verification
Marvell Technology

Senior Staff Verification Engineer

Santa Clara, CA|Verification
GlobalFoundries

Experienced Staff Design Engineer, Verification

3 Locations|Verification
GlobalFoundries

Experienced Staff Design Engineer, Verification

Richardson|Verification
GlobalFoundries

Experienced Staff Design Engineer, Verification

Richardson|Verification
GlobalFoundries

Design Engineer, Verification

Richardson|Verification
Micron Technology

Senior Design Verification Engineer

San Jose, CA|Verification
Micron Technology

Principal Engineer - Memory Circuit Design Verification

Hyderabad - Phoenix Aquila, India|Verification
Micron Technology

Staff Engineer, ASIC Design Verification

Hyderabad - Phoenix Aquila, India|Verification
NVIDIA

Senior DFT Verification Engineer

India, Bengaluru|Verification
NVIDIA

Senior IP Design Verification Engineer - XBAR IP

India, Bengaluru|Verification
Marvell Technology

Principal Engineer - Verification / AMS / SerDes

Bangalore|Verification
Intel

Senior Design Verification Engineer

US, California, Santa Clara|Verification
NVIDIA

Verification Engineer - PCIE

India, Bengaluru|Verification
NVIDIA

Verification Engineer, PCIE

India, Bengaluru|Verification
NVIDIA

ASIC Verification Engineer

India, Hyderabad|Verification
NVIDIA

ASIC Verification Engineer

India, Hyderabad|Verification
NVIDIA

Formal Verification Engineer - New College Grad 2026

US, CA, Santa Clara|Verification
Cadence Design Systems

Intern: Application Engineering - System Verification: Emulation

BELO HORIZONTE|Verification
Cadence Design Systems

Intern: Application Engineering - Digital Verification & Simulation/VIP

BELO HORIZONTE|Verification
Cadence Design Systems

Intern: Application Engineering - Digital Simulation/Verification & Agentic AI

BELO HORIZONTE|Verification
Cadence Design Systems

Intern: Application Engineering - Formal Verification

BELO HORIZONTE|Verification
Cadence Design Systems

Intern: Application Engineering - Digital Verification Xcelium

BELO HORIZONTE|Verification
NXP Semiconductors

Principal Digital IP Verification Engineer

Austin (Oakhill, Office)|Verification
NXP Semiconductors

Senior Design Verification Engineer

Austin (Oakhill, Office)|Verification
NXP Semiconductors

Senior IP Verification Engineer

Bangalore|Verification
NXP Semiconductors

Senior IP Verification Engineer

Bangalore|Verification
NXP Semiconductors

Principal Verification Engineer, Digital IP

Bangalore|Verification
NXP Semiconductors

Senior Principal Verification Engineer, Digital IP

Bangalore|Verification
Marvell Technology

Senior Engineer, Design Verification

Westborough, MA|Verification
Marvell Technology

Staff Engineer, Design Verification

Westborough, MA|Verification
Marvell Technology

Staff Engineer, Design Verification

Santa Clara, CA|Verification
Marvell Technology

Senior Staff Engineer, Design Verification

Santa Clara, CA|Verification
Marvell Technology

Senior Staff Engineer, Design Verification

Santa Clara, CA|Verification
Marvell Technology

Staff Engineer, Design Verification

Santa Clara, CA|Verification
Marvell Technology

Senior Staff Engineer, Design Verification

Morrisville, NC|Verification
Marvell Technology

Principal Engineer, Design Verification

Westborough, MA|Verification
Marvell Technology

Design Verification Engineer - Early Career

Ottawa, Canada|Verification
Analog Devices

Principal Engineer, Design Verification Engineering

US, TX, Austin, Plaza on the Lake|Verification
Micron Technology

Staff Design Verification Engineer, HBM Architecture

Richardson, TX|Verification
NVIDIA

Senior Verification Engineer - Hardware

US, CA, Santa Clara|Verification
NVIDIA

SoC Verification Lead

US, CA, Santa Clara|Verification
Cadence Design Systems

Lead Application Engineer - Design Verification

YOKOHAMA|Verification
Cadence Design Systems

Product Engineering Architect - Verification

GYEONGGI-DO (Seoul)|Verification
NXP Semiconductors

Principal Engineer - IP Verification

Noida|Verification
NXP Semiconductors

Senior Verification Engineer

Austin (Oakhill, Office)|Verification
NXP Semiconductors

Senior Digital IP Verification Engineer (f/m/d)

Munich|Verification
NXP Semiconductors

Principal Digital IP Verification Engineer (f/m/d)

Munich|Verification
NXP Semiconductors

Senior Digital IP Verification Engineer (f/m/d)

Munich|Verification
NXP Semiconductors

Digital IP Principal Verification Engineer

Austin (Oakhill, Office)|Verification
NXP Semiconductors

Senior Verification Engineer

Austin (Oakhill, Office)|Verification
Analog Devices

Senior Engineer, Design Verification Engineering

US, MA, Wilmington|Verification
Analog Devices

Staff Design Verification Engineer (AI/ML)

US, AZ, Chandler, East Elliot|Verification
NVIDIA

Senior Verification Engineer

India, Bengaluru|Verification
NXP Semiconductors

Senior Principal GPU verification Engineer

Bangalore|Verification
NXP Semiconductors

Principal IP verification engineer

Bangalore|Verification
NXP Semiconductors

Senior IP Verification Engineer

Bangalore|Verification
NXP Semiconductors

Senior Lead Engineer Verification

Noida|Verification
NXP Semiconductors

Principal Verification Engineer

Noida|Verification
NXP Semiconductors

Senior Lead Engineer - IP Verification

Noida|Verification
NXP Semiconductors

Senior Principal Engineer - IP Verification

Noida|Verification
NXP Semiconductors

Senior Principal Engineer - IP Verification

Noida|Verification
Analog Devices

Staff Design Verification Engineering

India, Bangalore, RMZ|Verification
NVIDIA

Manager, Firmware Verification Infrastructure

Israel, Yokneam|Verification
NVIDIA

Chip Design Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

Senior Full Chip Layout and Physical Verification CAD Engineer

2 Locations|Verification
NVIDIA

Senior Formal Verification Engineer

US, CA, Santa Clara|Verification
Analog Devices

Principal Engineer, Digital Verification Engineering

US, AZ, Chandler, East Elliot|Verification
GlobalFoundries

Principal Design Verification Engineer

2 Locations|Verification
Broadcom

ASIC Design Verification Engineer

3 Locations|Verification
Broadcom

IC Design & Verification Engineer

ISR-Tel Aviv University|Verification
Intel

CPU Design Verification Engineer

Malaysia, Penang|Verification
Intel

CPU HVM Functional-Test Verification Engineer

Malaysia, Penang|Verification
Intel

Senior Logic Design Verification Engineer

Malaysia, Penang|Verification
Broadcom

Design Verification Engineer

USA-CA San Jose Innovation Drive|Verification
Broadcom

Design Verification Engineer

USA-CA San Jose Innovation Drive|Verification
NXP Semiconductors

Lead Design Engineer - Functional Validation

Noida|Verification
NXP Semiconductors

Software Engineer – Hardware Design Verification

Kanata|Verification
Marvell Technology

Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026)

Santa Clara, CA|Verification
Marvell Technology

Design Verification Engineer Intern - Fall 2026

Ottawa, Canada|Verification
Micron Technology

Design and Verification Engineer, Pathfinding

Folsom, CA|Verification
Intel

IP Design Verification Engineer

2 Locations|Verification
Broadcom

Design Verification Engineer

USA-CA San Jose Innovation Drive|Verification
NVIDIA

ASIC Verification Engineer - GPU

2 Locations|Verification
NVIDIA

ASIC Verification Engineer

China, Shanghai|Verification
NVIDIA

Senior Custom SOC IP Verification Engineer

China, Shanghai|Verification
Cadence Design Systems

Sr Principal Application Engineer - Design Verification

YOKOHAMA|Verification
Intel

Verification Engineer Senior

US, Texas, Austin|Verification
Intel

Principal Engineer, Verification

Virtual US|Verification
Intel

Design Verification Engineer

US, California, Santa Clara|Verification
Intel

IP Design Verification Engineer

4 Locations|Verification
Broadcom

PCIe Verification Engr

IND-Bangalore Electronic City - S1|Verification
Broadcom

Subsystem/SoC Level Verification Engineer

IND-Bangalore Electronic City - S1|Verification
NVIDIA

Senior PCIe Design Verification Engineer

2 Locations|Verification
NVIDIA

IP Verification Engineer - GPU Core Pipeline

India, Bengaluru|Verification
NVIDIA

PCIe IP Verification Engineer

India, Bengaluru|Verification
NVIDIA

Senior Full-stack Software Engineer – Verification Data and Visualization Platform

3 Locations|Verification
Cadence Design Systems

IC Verification, Senior Account Technology Executive - Strategic Accounts

SAN JOSE|Verification
Cadence Design Systems

Lead Digital Verification Engineer

2 Locations|Verification
NXP Semiconductors

Junior Mixed Signal Verification Engineer

Catania|Verification
NXP Semiconductors

Junior Mixed Signal Verification Engineer

Catania|Verification
NXP Semiconductors

Junior Mixed Signal Verification Engineer

Catania|Verification
NXP Semiconductors

Digital Verification Engineer Intern - Fall 2026

Austin (Oakhill, Office)|Verification
NXP Semiconductors

Digital Verification Engineer Intern

Kanata|Verification
Analog Devices

Senior Software Verification Engineer, Datacenter Software

Spain, Valencia, Cortes Valencianas|Verification
Analog Devices

Digital Mixed Signal (DMS) Design Verification Engineer

India, Bangalore, RMZ|Verification
Analog Devices

Digital Mixed Signal (DMS) Design Verification Engineer

India, Bangalore, RMZ|Verification
NVIDIA

Architect - Performance Verification and Analysis

India, Bengaluru|Verification
NXP Semiconductors

Senior Digital Design & Verification Engineer

2 Locations|Verification
Analog Devices

Senior Engineer, Design Verification Engineering

3 Locations|Verification
Intel

Pre-si Verification Engineer

India, Bangalore|Verification
NVIDIA

Senior Chip Design Verification Engineer

Israel, Yokneam|Verification
NVIDIA

Senior Verification Engineer - HSIO Cluster and SOC

2 Locations|Verification
NVIDIA

Senior Verification Engineer - Hardware

2 Locations|Verification
NVIDIA

Senior Verification Engineer - ARM Fabric Unit Level

2 Locations|Verification
NVIDIA

ASIC Verification Engineer

2 Locations|Verification
NVIDIA

Verification Engineer - Memory Subsystem

India, Bengaluru|Verification
NVIDIA

Formal Verification Engineer

2 Locations|Verification
NVIDIA

Verification Engineer, Performance

India, Bengaluru|Verification
NVIDIA

Chip Design Verification Engineer

2 Locations|Verification
Cadence Design Systems

Software Engineer II: Verification IP Development

BELO HORIZONTE|Verification
Analog Devices

Director, Design verification engineering

India, Bangalore, RMZ|Verification
Micron Technology

Staff engineer , ASIC AMS Verification

2 Locations|Verification
Intel

Formal Verification Engineer

India, Bangalore|Verification
Intel

Pre Silicon Verification Engineer

Virtual Canada|Verification
NVIDIA

Chip Design Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

Senior Network Engineer, System Verification

US, CA, Santa Clara|Verification
NVIDIA

CPU Verification Infrastructure Tools Architect

2 Locations|Verification
NVIDIA

Verification Engineer - Networking IPs

2 Locations|Verification
Marvell Technology

Principal, Design Verification Engineer, Secure Root of Trust

Santa Clara, CA|Verification
Analog Devices

Staff Design Verification Engineer

United Kingdom, Edinburgh, SC, Freer|Verification
NVIDIA

Senior SOC Verification Engineer

2 Locations|Verification
Intel

Design Verification Architect

2 Locations|Verification
Intel

Senior Design Verification Engineer

India, Bangalore|Verification
Intel

Pre-si Verification Engineer

India, Bangalore|Verification
Broadcom

IC Verification Engineer

IND-Bangalore Electronic City - S1|Verification
NVIDIA

System Verification Co-Design Engineer - Speed and Rel

US, CA, Santa Clara|Verification
NVIDIA

Senior Formal Verification Engineer

Israel, Yokneam|Verification
NVIDIA

Senior Formal Verification Engineer

Israel, Beer Sheva|Verification
Micron Technology

設計検証エンジニア/ Design Verification Engineer

Hashimoto, Japan|Verification
NVIDIA

Manager, Software Verification

Israel, Yokneam|Verification
NVIDIA

GPU Core Pipeline IP Verification Engineer

India, Bengaluru|Verification
NVIDIA

ASIC Verification Engineer - New College Grad 2026

US, CA, Santa Clara|Verification
Micron Technology

New College Grad - Semiconductor Verification Design Engineer, DRAM Products Group

Boise, ID - Main Site|Verification
Micron Technology

New College Grad - Verification Enablement, Test Structure Design and Layout

Jalisco, Mexico|Verification
NVIDIA

Formal Verification Engineer - New College Grad 2026

US, CA, Santa Clara|Verification
Cadence Design Systems

Senior Principal Product Manager - Digital and Mixed-signal Verification Solutions

AUSTIN|Verification
Cadence Design Systems

Senior Principal Product Manager - Digital and Mixed Signal Verification Solutions

2 Locations|Verification
Marvell Technology

Senior Staff Physical Verification CAD Engineer

Singapore|Verification
Marvell Technology

Staff Design Verification Engineer, UAL and PCIe Subsystems

Santa Clara, CA|Verification
Analog Devices

Staff Engineer, Design Verification Engineering

US, MA, Wilmington|Verification
Micron Technology

SoC Physical Verification Engineer, HBM

2 Locations|Verification
Intel

IP Design Verification Engineer

US, California, Folsom|Verification
Intel

Mixed Signal Design Verification Engineer

India, Bangalore|Verification
NVIDIA

Verification Engineer, Emulation and Prototyping

US, CA, Santa Clara|Verification
NVIDIA

Senior Memory Controller Verification Engineer

5 Locations|Verification
NVIDIA

Senior AI Verification Chip Design Engineer

2 Locations|Verification
NVIDIA

Senior Chip Design Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

Custom SOC IP Verification Engineer

2 Locations|Verification
NXP Semiconductors

Lead Digital design and verification for MixSignal IP/Subsystem

2 Locations|Verification
Micron Technology

DRAM Verification Engineer

Hashimoto, Japan|Verification
Broadcom

Verification Engineer

2 Locations|Verification
Broadcom

Subsystem/SoC Level Verification Engineer

IND-Bangalore Electronic City - S1|Verification
Broadcom

Subsystem/SoC Level Verification Engineer

IND-Bangalore Electronic City - S1|Verification
NVIDIA

Senior Chip Design Verification Engineer

Israel, Tel Aviv|Verification
NVIDIA

ASIC Verification Engineer

India, Hyderabad|Verification
NVIDIA

Manager, Software Verification - Bluefield BMC

2 Locations|Verification
NVIDIA

SoC Verification Engineer

Taiwan, Taipei|Verification
Intel

Mixed Signal IP Verification Engineer

India, Bangalore|Verification
Intel

SOC Design Verification Engineer

India, Bangalore|Verification
NVIDIA

DFT Verification Engineer

2 Locations|Verification
NVIDIA

Senior ASIC Verification Engineer

2 Locations|Verification
NVIDIA

CPU and SOC Verification Engineer

India, Bengaluru|Verification
Analog Devices

Senior Design Verification Engineer

Philippines, Bonifacio Global City|Verification
Intel

CPU Pre-Silicon Verification Engineer

US, California, Folsom|Verification
Intel

Senior USB IP Design Verification Engineer

2 Locations|Verification
NVIDIA

Senior Design Verification Engineer - Hardware

China, Shanghai|Verification
NVIDIA

Senior ASIC Verification Engineer - Networking Chip Design

China, Shanghai|Verification
NXP Semiconductors

Principal IC Design Verification Engineer

Kanata|Verification
Analog Devices

Staff Engineer, Design Verification Engineering

India, Bangalore, RMZ|Verification
Analog Devices

Senior Manager, Design Verification Engineering

India, Bangalore, RMZ|Verification
Analog Devices

Staff Digital Verification Engineer

India, Bangalore, Nova|Verification
Intel

Senior Pre-Silicon Verification Engineer

Virtual Canada|Verification
NVIDIA

Formal Verification Engineer

Israel, Yokneam|Verification
NVIDIA

Senior Verification Engineer, Switch SoC

India, Bengaluru|Verification
NVIDIA

Manager, AIR SaaS Platform Verification

Israel, Tel Aviv|Verification
Intel

Mixed Signal IP Verification Engineer

India, Bangalore|Verification
Intel

Mixed Signal Design Verification Engineer

US, Oregon, Hillsboro|Verification
NVIDIA

DFT Verification Engineer

2 Locations|Verification
NXP Semiconductors

Verification Engineer

Hyderabad|Verification
Marvell Technology

Engineer, Design Verification

Pune|Verification

Other specialisations