Shift Yield Defect Metrology Engineer

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About This Role

  • Key Responsibilities Shift Monitoring and Operations - Perform real-time monitoring of defect signals, SPC, and inspection data during shift to ensure timely detection, disposition, and escalation of yield risks Data Analytics and Yield Learning - Apply statistical methods, visualization, and advanced analytics to identify yield limiters and generate actionable insights from high-volume manufacturing data Defect Data Compilation and Reporting - Compile, analyze, and report defect data to support yield learning, stakeholder communication, and decision-making Hold Lot Disposition Support - Support defect hold lot review and disposition decisions by combining defect analysis, process understanding, and risk assessment to ensure proper containment and flow continuity Defect Analysis and Root Cause - Execute defect analysis, fault isolation, and failure investigation to identify root causes and assess impact on yield and reliability Cross-Functional Collaboration - Partner with integration, module, metrology, and operations teams to resolve yield issues and drive alignment on corrective actions Defect Classification and ADC - Improve defect classification accuracy through ADC model support, validation, and continuous learning Defect Spec, OCAP Support - Support development and updates of defect specifications, OCAPs, and best known methods to ensure standardized and effective defect control Continuous Improvement and Standardization - Drive continuous improvement initiatives and cross-site standardization to reduce baseline defect levels and improve operational performance Training and Capability Building - Provide technical training and mentorship to technicians to ensure consistent execution and operational excellence Requirements Strong communication skills with the ability to collaborate effectively with global teams especially US stakeholders without communication barriers Willingness to work in a shift based support model including non-standard working hours Attention to detail and commitment to quality standards Proactive and willing to work in a dynamic and team oriented environment Strong problem solving skills with high self initiative and continuous learning capability and comfort working with a high degree of autonomy Qualifications: Minimum Qualifications Bachelor's degree in a specialized field (e.g., Electrical Engineering, Mechanical Engineering, Materials Science, or related discipline).
  • Ideal experience 3 years in semiconductor industrial, possess semiconductor HVM manufacturing process flow knowledge.
  • Open to fresh graduates with a strong interest in semiconductor manufacturing.

Nice to Have

  • Prior experience in semiconductor manufacturing, yield engineering, defect reduction, or defect metrology, preferably in a high-volume production environment Experience in distance engineering support across global sites, enabling effective issue resolution without on-site presence-Demonstrated knowledge of applying statistical and analytical techniques to yield improvement.
  • Experience with Python for data analysis and process modelling-Sense of ownership and collaboration with cross-functional partners to drive yield enhancement.

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Intel

Malaysia, Penang

Specialisation
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641 positions
Job ID
/job/Malaysia-Penang/Shift-Yield-Defect-Metrology-Engineer_JR0284850

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