Physical Design Jobs in India
124 open physical design positions at NVIDIA, Intel, Cadence Design Systems, NXP Semiconductors and more. Sourced directly from company career pages.
NVIDIA(36)Intel(27)Cadence Design Systems(15)NXP Semiconductors(14)Micron Technology(11)Analog Devices(7)
Intel
Principal Engineer, Physical Design
India, Bangalore|Physical Design
Cadence Design Systems
Lead Application Engineer - GCS ( Physical Design )
BANGALORE|Physical Design
NXP Semiconductors
Lead Physical Design Engineer
Bangalore|Physical Design
NXP Semiconductors
Physical Design Methodologies Lead
Noida|Physical Design
NXP Semiconductors
Principal Engineer - Physical Design
Noida|Physical Design
Marvell Technology
Senior Staff/ Principal Engineer CAD Engineer (P&R)
Bangalore|Physical Design
GlobalFoundries
Physical Design Lead (PnR, STA)
IND - Karnataka - Bengaluru - North|Physical Design
Micron Technology
Principal Physical Design Architect, HBM
Richardson, TX|Physical Design
Intel
CPU Core Senior Physical Design Engineer
US, California, Folsom|Physical Design
Intel
Senior Physical Design Integration Engineer
3 Locations|Physical Design
Intel
Physical Design Engineer
Malaysia, Penang|Physical Design
Intel
Senior CPU Physical Design Engineer
2 Locations|Physical Design
Intel
Physical Design (Backend) Technical Leader
Israel, Petah-Tikva|Physical Design
NVIDIA
Senior Physical Design Engineer
US, MA, Westford|Physical Design
NVIDIA
Senior Physical Design Methodology Engineer, PPA Fusion Compiler
3 Locations|Physical Design
NVIDIA
Senior Physical Design Methodology Engineer, Innovus Flows
4 Locations|Physical Design
NVIDIA
Senior Software R&D Engineer, VLSI Physical Design
US, TX, Austin|Physical Design
NVIDIA
Senior Software R&D Engineer, VLSI Physical Design
2 Locations|Physical Design
NVIDIA
Senior Physical Design Engineer
3 Locations|Physical Design
NVIDIA
Senior ASIC Physical Design Engineer, Netlisting
2 Locations|Physical Design
NVIDIA
Senior Physical Design Engineer
2 Locations|Physical Design
NVIDIA
Physical Design Backend Engineer
2 Locations|Physical Design
NVIDIA
Senior Physical Design Layout Engineer
3 Locations|Physical Design
NVIDIA
Physical Design Engineer
US, MA, Westford|Physical Design
Cadence Design Systems
Lead Design Engineer - Physical Design
BEIJING|Physical Design
Cadence Design Systems
Application Engineer I: Physical Design - Synthesis and Digital Implementation
BELO HORIZONTE|Physical Design
NXP Semiconductors
SoC Digital Physical Design Engineer - MCU
Catania|Physical Design
NXP Semiconductors
2026 Campus - SoC Backend Design Engineer
Tianjin (Teda)|Physical Design
Analog Devices
Staff Engineer, Physical Design
3 Locations|Physical Design
NVIDIA
Physical Design Backend STA Engineer
2 Locations|Physical Design
NVIDIA
Physical Design Backend Engineer
Israel, Tel Aviv|Physical Design
NXP Semiconductors
Senior Principal Physical Design Engineer
Pune|Physical Design
Marvell Technology
Physical Design Intern
Cordoba, Argentina|Physical Design
Analog Devices
Engineer, Physical Design Engineering
Philippines, Bonifacio Global City|Physical Design
NVIDIA
ASIC Physical Design Methodology Engineer
China, Shanghai|Physical Design
Intel
SOC Physical Design Static Timing Analysis Engineer
2 Locations|Physical Design
Intel
CPU Physical Design Engineer -Technology & Pathfinding
2 Locations|Physical Design
NXP Semiconductors
Senior Physical Design Leader MCU
Yokneam Ilit|Physical Design
Micron Technology
SMTS Physical Design Engineer
5 Locations|Physical Design
NVIDIA
ASIC Floorplan Design Engineer - New College Grad 2026
US, CA, Santa Clara|Physical Design
NVIDIA
ASIC Physical Design Engineer, Netlisting - New College Grad 2026
2 Locations|Physical Design
NVIDIA
ASIC Physical Design Engineer
China, Shanghai|Physical Design
Cadence Design Systems
Chip Lead / Physical Design Director
2 Locations|Physical Design
Micron Technology
HBM SoC Physical Design Engineer
Richardson, TX|Physical Design
NVIDIA
Senior Physical Design Engineer
2 Locations|Physical Design
NVIDIA
Senior Physical Design Engineer
US, CA, Santa Clara|Physical Design
Marvell Technology
Principal Engineer - Physical Design
Bangalore|Physical Design
Analog Devices
Staff Physical Design Engineer
CLOSED-India, Bangalore, Aveda Meta|Physical Design
Micron Technology
Principal Engineer, ASIC Physical Design
Minneapolis, MN|Physical Design
NXP Semiconductors
Lead Physical Design Engineer
3 Locations|Physical Design
Micron Technology
Senior SOC Physical Design Engineer, HBM
Richardson, TX|Physical Design
NVIDIA
Physical Design Methodology Engineer
Taiwan, Hsinchu|Physical Design
Intel
Senior Physical Design Engineer
Malaysia, Penang|Physical Design
NVIDIA
Senior ASIC Floorplan Design Engineer
2 Locations|Physical Design
GlobalFoundries
Principal Engineer Physical Design
Richardson|Physical Design
Analog Devices
Senior Engineer, Physical Design Engineering
2 Locations|Physical Design
NVIDIA
Physical Design Signoff CAD Engineer
Israel, Yokneam|Physical Design
NVIDIA
Physical Design Engineer
Taiwan, Hsinchu|Physical Design
Marvell Technology
Sr Staff Manager - Physical Design
Bangalore|Physical Design
Analog Devices
Staff Physical Design Engineer
India, Bangalore, RMZ|Physical Design
Analog Devices
Principal Engineer, Physical Design
India, Bangalore, RMZ|Physical Design
Analog Devices
Staff Engineer Physical Design Flow Expert / PD Methodology & Automation
India, Bangalore, RMZ|Physical Design
Intel
CPU Physical Design Engineer
US, Texas, Austin|Physical Design
Intel
CPU Physical Design Engineer
US, Texas, Austin|Physical Design
Intel
CPU Physical Design Engineer
US, Texas, Austin|Physical Design
Cadence Design Systems
Physical Design Principal AE
SAN JOSE|Physical Design
NXP Semiconductors
Principal Physical Design Engineer
Bangalore|Physical Design
Micron Technology
Engineer, ASIC Physical Design
Minneapolis, MN|Physical Design
Micron Technology
SoC Physical Design Engineer, Senior Member of Technical Staff (SMTS)
2 Locations|Physical Design
Intel
Physical Design Engineer- Foundry Services
US, Arizona, Phoenix|Physical Design
NVIDIA
Senior Physical Design Engineer
Israel, Yokneam|Physical Design
Cadence Design Systems
Sr. Principal Physical Design AE
SAN JOSE|Physical Design
Micron Technology
Staff Engineer: Physical Design
Hyderabad - Phoenix Aquila, India|Physical Design
Micron Technology
Staff Engineer, ASIC Physical Design
Hyderabad - Phoenix Aquila, India|Physical Design
NVIDIA
Software R&D Engineer, VLSI Physical Design - New College Grad 2026
US, TX, Austin|Physical Design
Micron Technology
HBM SoC Physical Design Engineer
Richardson, TX|Physical Design
Broadcom
R&D Engineer Physical Design
USA-CA San Jose Innovation Drive|Physical Design
Cadence Design Systems
Application Engineer - Physical Design (Back-End)
2 Locations|Physical Design
Cadence Design Systems
Application Engineer - Physical Design (Back-End)
PETAH TIKVA|Physical Design
NXP Semiconductors
Senior Principal Physical Design Engineer
Leuven|Physical Design
Cadence Design Systems
Product Engineer II - P&R
GYEONGGI-DO 03 (SEOUL)|Physical Design
Intel
Qubit Control Physical Design Engineer
US, Oregon, Hillsboro|Physical Design
NVIDIA
Manager, Physical Design Circuit and Signoff CAD
Israel, Yokneam|Physical Design
Broadcom
R&D Physical Design Engineer
China-Shanghai-Zhangjiang Hi Tech|Physical Design
Broadcom
R&D Physical Design Engineer
China-Shanghai-Zhangjiang Hi Tech|Physical Design
Broadcom
ASIC Physical Design Engineer
China-Shanghai-Zhangjiang Hi Tech|Physical Design
Broadcom
R&D Physical Design Engineer
China-Shanghai-Zhangjiang Hi Tech|Physical Design
NXP Semiconductors
Physical Design engineer
Noida|Physical Design
Intel
Physical Design Engineer
India, Bangalore|Physical Design
Intel
E-core CPU Physical Design Engineer
Malaysia, Penang|Physical Design
Intel
E-core CPU Physical Design Engineer
Malaysia, Penang|Physical Design
Cadence Design Systems
Physical Design Engineer II (PNR/Physical Verification/STA/EMIR)
2 Locations|Physical Design
Cadence Design Systems
Design Engineer - Physical Design
SHANGHAI|Physical Design
NVIDIA
Senior ASIC Floorplan Design Engineer
2 Locations|Physical Design
Intel
Senior Physical Design Engineer
Costa Rica, San Jose|Physical Design
Intel
Physical Design Engineer
Mexico, Guadalajara|Physical Design
Intel
SOC Physical Design Engineer
India, Bangalore|Physical Design
NVIDIA
Senior GPU Floorplan Design Engineer
India, Bengaluru|Physical Design
NVIDIA
ASIC Physical Design Engineer
China, Shanghai|Physical Design
Intel
Senior CPU Core Physical Design Engineer
2 Locations|Physical Design
NVIDIA
ASIC Physical Design and Timing Engineer - New College Grad 2026
US, CA, Santa Clara|Physical Design
Cadence Design Systems
Principal Design Engineer - Physical Design
SHANGHAI|Physical Design
Intel
Senior Physical Design Engineer (CPU)
US, Oregon, Hillsboro|Physical Design
NVIDIA
Senior Physical Design and Timing Engineer
4 Locations|Physical Design
NVIDIA
Physical Design Engineer
Taiwan, Hsinchu|Physical Design
NVIDIA
Physical Design CAD Engineer
2 Locations|Physical Design
Marvell Technology
Senior Staff Manager, Physical Design
Hsinchu City|Physical Design
Micron Technology
Staff Engineer - ASIC Physical Design
Bengaluru, India|Physical Design
Cadence Design Systems
Principal application Engineer – Digital Implementation & Physical Design
PENANG 02|Physical Design
Marvell Technology
Principal Engineer, Physical Design
Hsinchu City|Physical Design
NXP Semiconductors
Digital Physical Design Engineer
Noida|Physical Design
Intel
Physical Design Engineer
Mexico, Guadalajara|Physical Design
Broadcom
Physical Design Engineer
IND-Bangalore Electronic City - S1|Physical Design
Cadence Design Systems
Software Engineering Director/Architect, 3DIC P&R & AI-driven EDA Automation
AUSTIN|Physical Design
Cadence Design Systems
Software Architect, 3DIC P&R & AI-driven EDA Automation
SAN JOSE|Physical Design
NXP Semiconductors
Digital Physical Design (P&R) Intern
Chandler (Office)|Physical Design
NXP Semiconductors
Physical Design Engineer
Pune|Physical Design
Intel
Physical Design Engineer
Malaysia, Penang|Physical Design
NVIDIA
Physical Design Backend Engineer
2 Locations|Physical Design
NVIDIA
Physical Design Engineer
Israel, Tel Aviv|Physical Design
Intel
Physical Design Intern
Vietnam, Ho_Chi_Minh_City|Physical Design
Intel
Physical Design Intern
Vietnam, Ho_Chi_Minh_City|Physical Design
NVIDIA
Physical Design Methodology and Operations Engineer - New College Grad 2026
US, CA, Santa Clara|Physical Design
Intel
Junior Physical Design Engineer (CPU)
US, Oregon, Hillsboro|Physical Design