Marvell Jobs in India
570 open roles across 38 cities and 8 specialisations
By specialisation
By city
CA218
2 Locations62
Bangalore59
Canada33
Singapore28
Argentina24
3 Locations17
Italy14
Ho Chi Minh14
Hsinchu City13
US-CA - San Diego11
Hyderabad9
Pune8
MA6
TX6
Petah-Tikva5
VT4
TW - Hsinchu4
Yokneam3
US-CA - Santa Clara3
Madrid3
Shanghai3
CH - Adliswil3
Taipei2
4 Locations2
IL - Petah Tikva2
Shenzhen2
Romania2
US-NY - Hudson Valley1
KR - Seoul1
US-TX - Austin1
US-CA - Irvine1
CA-ON - Toronto - TOR1
IN - Bangalore1
Osaka1
IN - Hyderabad1
NC1
Remote - US - CA1
All Marvell roles (570)
Marvell Technology
Staff/Sr. Staff Field Applications Engineer(Switching)
Bangalore|Other
Marvell Technology
Sr Staff Firmware Engineer
Pune|Embedded
Marvell Technology
Staff Engineer- PCIe Driver/ Linux Kernel Driver Development
Hyderabad|Other
Marvell Technology
Director, IT Enterprise Applications & Platforms
Bangalore|Other
Marvell Technology
Director/Senior Account Manager – Strategic Accounts Sales
Bangalore|Other
Marvell Technology
Staff/Sr. Staff Field Applications Engineer
Bangalore|Other
Marvell Technology
Staff Verification Engineer- PCIe/UALink/CXL
Bangalore|Verification
Marvell Technology
Staff/ Senior Staff QA Engineer (C, C++, Python, CXL, PCIE)
Hyderabad|Other
Marvell Technology
DE05T5 - Design Verification Principal Engineer
Bangalore|Verification
Marvell Technology
Principal Design Verification Engineer
Bangalore|Verification
Marvell Technology
Principal Engineer - Digital IC Design
Bangalore|Other
Marvell Technology
Memory Layout Staff Engineer
Bangalore|Other
Marvell Technology
Sr. Staff Physical Verification CAD engineer
Bangalore|Verification
Marvell Technology
Windows Device Driver Developer ( C, Kernel Programming, Storage protocols )
Pune|Embedded
Marvell Technology
Senior Staff/ Principal Engineer CAD Engineer (P&R)
Bangalore|Physical Design
Marvell Technology
Staff to Senior Staff Engineer, DFT
Bangalore|DFT
Marvell Technology
Analog Design - Senior Principal Engineer
Bangalore|Analog/MS
Marvell Technology
Sr. Staff Manager (Storage Protocol/ Fibre Channel Architecture & Development)
Pune|Other
Marvell Technology
Senior Director of SoC Design Verification
US-CA - San Diego|Verification
Marvell Technology
Senior Director of SoC Design
US-CA - San Diego|SoC
Marvell Technology
Distinguished Engineer: Advanced Optical Engines
Santa Clara, CA|Other
Marvell Technology
senior staff signal/power integrity engineer
Yokneam|Other
Marvell Technology
Senior Staff Engineer of SRAM Circuit Design & Validation
Bangalore|Other
Marvell Technology
Senior Staff Engineer, ASIC/VLSI Synthesis and Design
2 Locations|Other
Marvell Technology
Senior Staff Engineer, ASIC Design/Implementation -- LEC/STA/Power Analysis
2 Locations|Other
Marvell Technology
Senior Staff Engineer, Design For Test - Automation & Infrastructure
Ottawa, Canada|DFT
Marvell Technology
Senior Emulation Engineer
2 Locations|Other
Marvell Technology
Senior Staff Digital Design Engineer
Ottawa, Canada|RTL Design
Marvell Technology
Principal Demand Planner
Santa Clara, CA|Other
Marvell Technology
Principal Engineer, Analog IC Design
Singapore|Analog/MS
Marvell Technology
Staff Engineer, Software / Firmware Engineering
Taipei|Embedded
Marvell Technology
Staff Engineer, Product Engineering
Singapore|Other
Marvell Technology
Model Correlation & SI Intern - Ph. D Degree
Ottawa, Canada|Other
Marvell Technology
Principal Test Engineer (Optical Module)
Santa Clara, CA|Other
Marvell Technology
Staff Applications Engineering - Network Validation
Santa Clara, CA|Other
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Staff Engineering Program Manager – Custom Silicon (APAC)
Singapore|Other
Marvell Technology
Senior Staff Engineer, Test Engineering
Singapore|Other
Marvell Technology
Sr. Staff Verification Engineer
Santa Clara, CA|Verification
Marvell Technology
Sr. Staff Verification Engineer
Santa Clara, CA|Verification
Marvell Technology
Technical Lead, Design Verification
Santa Clara, CA|Verification
Marvell Technology
Package Development, Signal Integrity and Power Integrity Engineer, Senior Staff
Santa Clara, CA|Other
Marvell Technology
Sr. Staff Design Verification Engineer
Irvine, CA|Verification
Marvell Technology
Principal Design Verification Engineer
Irvine, CA|Verification
Marvell Technology
Technical Lead IC Design/Principal - Micro-architecture, RTL Design
Ottawa, Canada|RTL Design
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
Santa Clara, CA|Other
Marvell Technology
Supplier Quality Engineer (SQE) – Photonics & Optical Packaging
Singapore|Other
Marvell Technology
Senior / Staff Verification Engineer - RF/TIA (Analog Mixed Signal)
Singapore|Verification
Marvell Technology
Distinguished Engineer - Memory Subsystem Center of Excellence (CoE), Custom Silicon
Santa Clara, CA|Other
Marvell Technology
Principal Post-Silicon Validation Engineer
Santa Clara, CA|Other
Marvell Technology
Package Integration Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Staff Post-Silicon Validation Engineer
Santa Clara, CA|Other
Marvell Technology
Director, Design Verification
2 Locations|Verification
Marvell Technology
DFT Manager
Ottawa, Canada|DFT
Marvell Technology
Staff Engineer, Analog IC Design
Irvine, CA|Analog/MS
Marvell Technology
Emulation Lead, Senior Principal Engineer
Santa Clara, CA|Other
Marvell Technology
Sr. Principal Engineer, Advanced Packaging
Santa Clara, CA|Other
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
Santa Clara, CA|Other
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
Santa Clara, CA|Other
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Staff CAD Engineer, Multi-die 3DIC & Power
Santa Clara, CA|CAD/EDA
Marvell Technology
Principal Engineer - Digital IC Design
Pavia, Italy|Other
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
Westborough, MA|Other
Marvell Technology
Signal Integrity/Power Integrity Principal Engineer
Santa Clara, CA|Other
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
Westborough, MA|Other
Marvell Technology
Test Engineer - ATE & SLT
Santa Clara, CA|Other
Marvell Technology
Hardware Validation (Test Solutions) Engineer
Burlington, VT|Other
Marvell Technology
Senior Staff Analog Design Engineer - ESD
Singapore|Analog/MS
Marvell Technology
Senior Principal Engineer, Test Solutions Engineering (APAC Region)
Singapore|Other
Marvell Technology
Rack Level Integration Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Staff Digital Verification Engineer – Wireline PHYs
Toronto, Canada|Verification
Marvell Technology
Link Layer architect
Santa Clara, CA|Other
Marvell Technology
DSP System Engineering Intern
Pavia, Italy|Other
Marvell Technology
Analog IC Design
Ho Chi Minh|Analog/MS
Marvell Technology
Senior Principal Engineer, Design Verification
Ottawa, Canada|Verification
Marvell Technology
Senior Staff CAD Engineer
Ho Chi Minh|CAD/EDA
Marvell Technology
Principal Engineer - Digital IC Design
Pavia, Italy|Other
Marvell Technology
Principal Financial Analyst - Corporate FP&A
3 Locations|Other
Marvell Technology
Advanced Packaging SI/PI Senior Staff Engineer
Burlington, VT|Other
Marvell Technology
Senior Staff Digital Design Engineer
4 Locations|RTL Design
Marvell Technology
Principal, IC Digital Design Engineer
Irvine, CA|RTL Design
Marvell Technology
HR Operations Lead
Irvine, CA|Other
Marvell Technology
Advanced Packaging SI/PI Senior Staff Engineer
2 Locations|Other
Marvell Technology
Staff Application Engineer
Santa Clara, CA|Other
Marvell Technology
SoC / RTL Low-Power Expert
US-CA - Santa Clara|RTL Design
Marvell Technology
Embedded Software Engineer
Madrid|Embedded
Marvell Technology
Principal Engineer - Design For Test (DFT)
2 Locations|DFT
Marvell Technology
Senior Staff DFT Engineer
Santa Clara, CA|DFT
Marvell Technology
Senior Staff Engineer - Simulation Development( System C/ VDK)
2 Locations|Other
Marvell Technology
Package Development, Signal Integrity and Power Integrity Engineer, Staff
Austin, TX|Other
Marvell Technology
Principal Analog Mixed-Signal Design - Optical
Westlake Village, CA|Analog/MS
Marvell Technology
Staff DFT Engineer
Santa Clara, CA|DFT
Marvell Technology
Design Verification (Senior to Senior Staff Engineer)
Ho Chi Minh|Verification
Marvell Technology
Principal Validation Lead
Santa Clara, CA|Other
Marvell Technology
Principal Analog Mixed-Signal Design Engineer - Optical
2 Locations|Analog/MS
Marvell Technology
Analog Mixed Signal Design Engineer, Staff
Ottawa, Canada|Analog/MS
Marvell Technology
Principal Analog/Mixed Signal CAD Engineer
Santa Clara, CA|Analog/MS
Marvell Technology
Executive Travel & Global Events Manager
Santa Clara, CA|Other
Marvell Technology
Principal Engineer, Verification
Santa Clara, CA|Verification
Marvell Technology
Principal Application Engineer – SoC Embedded Systems (validation, characterization, and customer deployment support)
Santa Clara, CA|SoC
Marvell Technology
Firmware Engineer
Cordoba, Argentina|Embedded
Marvell Technology
Principle Validation and Hardware Design Engineer
Santa Clara, CA|Other
Marvell Technology
Analog Design Engineer, Principal
Pavia, Italy|Analog/MS
Marvell Technology
Senior Staff ASIC Design Engineer
Ottawa, Canada|Other
Marvell Technology
DSP Firmware Engineer
Cordoba, Argentina|Embedded
Marvell Technology
Optical Engineer, Advanced Photonic IC Development
Santa Clara, CA|Other
Marvell Technology
Staff Optical Engineer
Santa Clara, CA|Other
Marvell Technology
Optical Engineer, Senior Staff
Santa Clara, CA|Other
Marvell Technology
Silicon Photonics Engineer
Ottawa, Canada|Other
Marvell Technology
Design Verification Engineer, Principal
Santa Clara, CA|Verification
Marvell Technology
Analog Design Engineer, Senior Staff
Vancouver, Canada|Analog/MS
Marvell Technology
Technical Lead, IC Design
Santa Clara, CA|Other
Marvell Technology
Sr. Staff Global Mobility & Immigration Specialist
Santa Clara, CA|Other
Marvell Technology
Principal Hardware Engineer, Optics
Santa Clara, CA|Other
Marvell Technology
Analog Mixed Signal Design Engineer, Senior Staff
Toronto, Canada|Analog/MS
Marvell Technology
Sr. Executive Compensation Consultant
Toronto, Canada|Other
Marvell Technology
Senior Manager, ASIC Design
Santa Clara, CA|Other
Marvell Technology
Director – FP&A Systems
2 Locations|Other
Marvell Technology
Senior Director Product Security
3 Locations|Other
Marvell Technology
Design Verification, Senior to Senior Staff
Ho Chi Minh|Verification
Marvell Technology
Silicon Photonics Intern - Ph.D
Singapore|Other
Marvell Technology
Design/DSP/Verification Intern - PhD Degree
Santa Clara, CA|Verification
Marvell Technology
Analog Modeling/Verification Senior Staff Engineer
2 Locations|Verification
Marvell Technology
Principal AI Systems Engineer – Analog Design
Irvine, CA|Analog/MS
Marvell Technology
Staff Design Verification Engineer
Toronto, Canada|Verification
Marvell Technology
Director of Hardware Engineering – High-Speed Board Design & Signal Integrity
Santa Clara, CA|Other
Marvell Technology
Staff Analog Mixed-Signal Design - Optical
Westlake Village, CA|Analog/MS
Marvell Technology
Senior Staff Engineer Analog Mixed-Signal Design - Optical
2 Locations|Analog/MS
Marvell Technology
Principal Test Engineer
Santa Clara, CA|Other
Marvell Technology
Analog IC Design Intern - Master's Degree
Hsinchu City|Analog/MS
Marvell Technology
Staff Engineer - Embedded Firmware Development - CXL / PCIe / Near-memory accelerator / Memory-Expansion Controllers
Santa Clara, CA|Embedded
Marvell Technology
Design Verification Senior Staff Engineer
IL - Petah Tikva|Verification
Marvell Technology
Distinguished Engineer, Switch Architect
Santa Clara, CA|Other
Marvell Technology
Principle Verification Engineer
IL - Petah Tikva|Verification
Marvell Technology
Principal Applications Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Staff Field Application Engineer - Connectivity
Santa Clara, CA|Other
Marvell Technology
Design Verification, Manager
Ho Chi Minh|Verification
Marvell Technology
DFT Principal Engineer
2 Locations|DFT
Marvell Technology
Senior Design Verification engineer
2 Locations|Verification
Marvell Technology
Principal Design Engineer
2 Locations|Other
Marvell Technology
Analog Engineer Intern - PhD
Vancouver, Canada|Analog/MS
Marvell Technology
Analog Engineer Intern - PhD
Toronto, Canada|Analog/MS
Marvell Technology
Analog Engineer Intern - PhD
Ottawa, Canada|Analog/MS
Marvell Technology
Principal Mixed Signal Design Engineer
Toronto, Canada|Analog/MS
Marvell Technology
Silicon Photonics Intern - PhD (Fall 2026 Start Date)
Ottawa, Canada|Other
Marvell Technology
Senior Distinguished Engineer
Santa Clara, CA|Other
Marvell Technology
Principal Engineer , Software/Firmware - CXL/PCIe
Santa Clara, CA|Embedded
Marvell Technology
Principal Advanced Packaging Design Engineer
Burlington, VT|Other
Marvell Technology
Principal DSP Engineer
Santa Clara, CA|Other
Marvell Technology
Design Verification Senior to Staff Engineer
2 Locations|Verification
Marvell Technology
Senior Principal Switch Architect
Santa Clara, CA|Other
Marvell Technology
Senior Director Product Line Management - CPO
Santa Clara, CA|Other
Marvell Technology
Senior Principal Memory Architect
3 Locations|Other
Marvell Technology
Senior Staff Engineer - SerDes Digital Design
US-NY - Hudson Valley|RTL Design
Marvell Technology
Silicon Validation Engineer Junior/Intern
Pavia, Italy|Other
Marvell Technology
Applied Machine Learning Scientist Intern - PhD
Santa Clara, CA|Other
Marvell Technology
Security Developer (C, Linux, System Security, Embedded programming)
2 Locations|Embedded
Marvell Technology
Senior Staff Engineer, Analog IC Design
Irvine, CA|Analog/MS
Marvell Technology
Senior Staff RTL Design /Verification
2 Locations|Verification
Marvell Technology
Senior Staff Hardware Engineer - Optical
US-CA - Santa Clara|Other
Marvell Technology
Senior Principal Security Engineer– HSM & Cryptography
2 Locations|Other
Marvell Technology
Senior Staff Manager
2 Locations|Other
Marvell Technology
Staff Product Quality Engineer ( PQE)
Hsinchu City|Other
Marvell Technology
Analog Layout Staff Engineer
Toronto, Canada|Analog/MS
Marvell Technology
Physical Design Intern
Cordoba, Argentina|Physical Design
Marvell Technology
Director, Engineering IT
Bangalore|Other
Marvell Technology
Senior SQA Manager (C. C++, Python, CXL, PCIE)
Hyderabad|Other
Marvell Technology
Principal SQA Engineer (L2, L3, Python Automation)
Bangalore|Other
Marvell Technology
Sr. Staff Validation Engineer
Santa Clara, CA|Other
Marvell Technology
Electrical Design Validation Testing Engineer
Cordoba, Argentina|Other
Marvell Technology
Principal Application Engineer
Santa Clara, CA|Other
Marvell Technology
Firmware Engineering Intern
Pavia, Italy|Embedded
Marvell Technology
Optical Module Hardware Staff Application Engineering
Shanghai|Other
Marvell Technology
Optical Module Hardware Staff Field Application Engineering
Shenzhen|Other
Marvell Technology
Principal AMS verification engineer
Bangalore|Verification
Marvell Technology
Sr. Staff Analog Design engineer
Bangalore|Analog/MS
Marvell Technology
Staff Engineer - Validation
Ho Chi Minh|Other
Marvell Technology
Validation Engineer
Singapore|Other
Marvell Technology
ASIC Architect
Santa Clara, CA|Other
Marvell Technology
ASIC Architect
Santa Clara, CA|Other
Marvell Technology
Principal Verification Engineer
Santa Clara, CA|Verification
Marvell Technology
Staff/Sr. Staff Field Applications Engineer(Networking)
Bangalore|Other
Marvell Technology
Senior Staff Engineer – PCIe EP Host Software
Hyderabad|Other
Marvell Technology
Senior Analog Mixed-Signal Design Engineer
San Diego, CA|Analog/MS
Marvell Technology
Sr Staff Analog Mixed-Signal Design Engineer
San Diego, CA|Analog/MS
Marvell Technology
Sr Staff Analog Modeling/Verification Engineer
San Diego, CA|Verification
Marvell Technology
Staff Analog Mixed-Signal Design Engineer
San Diego, CA|Analog/MS
Marvell Technology
Principal Analog Mixed-Signal Design Engineer
San Diego, CA|Analog/MS
Marvell Technology
Sr Principal Analog Mixed Signal Design Engineer
US-CA - San Diego|Analog/MS
Marvell Technology
Senior Staff, Hardware Design - PCB Boards for Chip Validation
Santa Clara, CA|Other
Marvell Technology
Senior Principal Engineer, Digital IC Design
Santa Clara, CA|Other
Marvell Technology
Director – Supply Chain – Gross Margin Program Management
2 Locations|Other
Marvell Technology
Accelerated Computing Solutions Analyst - Early Career
Santa Clara, CA|Other
Marvell Technology
Senior Staff Firmware Engineer - low-level firmware/software for advanced Compute, Storage, and Custom ASIC platforms.
Santa Clara, CA|Embedded
Marvell Technology
Field Application Engineer Intern (Hardware)
Shanghai|Other
Marvell Technology
Field Application Engineer Intern (Software)
Shanghai|Other
Marvell Technology
Senior Staff Engineer - Subsystem CoE Emulation
Bangalore|Other
Marvell Technology
Staff Engineer - Subsystem CoE Emulation
Bangalore|Other
Marvell Technology
Senior Principal Engineer, Subsystem CoE Emulation
Bangalore|Other
Marvell Technology
Design Verification Engineer - Early Career
2 Locations|Verification
Marvell Technology
Senior Staff System & Modeling Engineer – Wireline Communications
Toronto, Canada|Other
Marvell Technology
Staff Engineer, Analog Layout
Singapore|Analog/MS
Marvell Technology
Principal IC Digital Design - SoC Design/Micro-architecture
Santa Clara, CA|RTL Design
Marvell Technology
Demand Planner
Santa Clara, CA|Other
Marvell Technology
Staff Professional Demand Planner
Santa Clara, CA|Other
Marvell Technology
Principal Engineer - PCIe RTL Design
Bangalore|RTL Design
Marvell Technology
Senior Staff Applications Engineer
Santa Clara, CA|Other
Marvell Technology
Analog Layout Staff Engineer
Pavia, Italy|Analog/MS
Marvell Technology
Design Verification Senior Staff Engineer
Petah-Tikva|Verification
Marvell Technology
Senior Design Engineer
Petah-Tikva|Other
Marvell Technology
Digital IC Design Senior Staff Engineer
Petah-Tikva|Other
Marvell Technology
Senior Staff Manager
Bangalore|Other
Marvell Technology
Senior Staff Verification Engineer
Pune|Verification
Marvell Technology
Director of Product Engineering, Optics
Santa Clara, CA|Other
Marvell Technology
Advanced Package Technology, Principal Engineer
3 Locations|Other
Marvell Technology
Optical Test Engineer
Ottawa, Canada|Other
Marvell Technology
Design Verification Engineer
2 Locations|Verification
Marvell Technology
Principal Engineer (L2, L3 Protocol Development, Switching/Routing)
Bangalore|Other
Marvell Technology
Director of SoC Design Verification
San Diego, CA|Verification
Marvell Technology
Sr Staff SoC Design Verification Manager
San Diego, CA|Verification
Marvell Technology
Staff Digital Design Engineer
US-CA - San Diego|RTL Design
Marvell Technology
Principal Digital Design Engineer
US-CA - San Diego|RTL Design
Marvell Technology
Sr Principal Digital Design Engineer
US-CA - San Diego|RTL Design
Marvell Technology
Sr Staff Digital Design Engineer
US-CA - San Diego|RTL Design
Marvell Technology
Staff Manager - SoC Design
US-CA - San Diego|SoC
Marvell Technology
Distinguished Engineer - Digital Design
US-CA - San Diego|RTL Design
Marvell Technology
Sr Principal SoC Verification Engineer
San Diego, CA|Verification
Marvell Technology
Sr Staff Manager - SoC Design
US-CA - San Diego|SoC
Marvell Technology
Sr Staff SoC Verification Engineer
San Diego, CA|Verification
Marvell Technology
Director of SoC Design
US-CA - San Diego|SoC
Marvell Technology
Principal SoC Verification
San Diego, CA|Verification
Marvell Technology
Senior SoC Design Verification Manager
San Diego, CA|Verification
Marvell Technology
Staff SoC Verification Engineer
San Diego, CA|Verification
Marvell Technology
Distinguished Engineer - SoC Verification
San Diego, CA|Verification
Marvell Technology
Senior Analog Layout Manager
San Diego, CA|Analog/MS
Marvell Technology
Analog/Mixed-Signal Design Engineer, Principal
2 Locations|Analog/MS
Marvell Technology
Principal Design Verification Engineer
2 Locations|Verification
Marvell Technology
Supplier Quality Engineer (SQE) – Photonics & Optical Packaging
KR - Seoul|Other
Marvell Technology
Senior Staff Applications Engineer
Santa Clara, CA|Other
Marvell Technology
FP&A Systems Principal Professional / Solution Architect
2 Locations|Other
Marvell Technology
Analog/Mixed-Signal Design Engineer, Principal
Santa Clara, CA|Analog/MS
Marvell Technology
Senior Staff SoC Design Engineer
Santa Clara, CA|SoC
Marvell Technology
Senior Staff Engineer, Analog IC Design
Santa Clara, CA|Analog/MS
Marvell Technology
Analog Design Engineer, Principal
Pavia, Italy|Analog/MS
Marvell Technology
Senior Manager, DFT
Bangalore|DFT
Marvell Technology
Senior Staff Engineer, Digital IC Design
TW - Hsinchu|Other
Marvell Technology
(Sr.) Staff Engineer, Digital IC Design
TW - Hsinchu|Other
Marvell Technology
Senior Principal Engineer, RTL ASIC Design
Bangalore|RTL Design
Marvell Technology
Sr. Principal Design Verification Engineer (PCIe/ CXL}
Bangalore|Verification
Marvell Technology
Vulnerability Management Professional
US-TX - Austin|Other
Marvell Technology
Senior Staff Optical Engineer
Santa Clara, CA|Other
Marvell Technology
Principal Analog and Mixed-Signal IC Design Engineer
Irvine, CA|Analog/MS
Marvell Technology
Frontend infrastructure CAD/tools Engineer
Bangalore|CAD/EDA
Marvell Technology
Emulation Staff Engineer
Ho Chi Minh|Other
Marvell Technology
Sr. Staff, Software Engineer - C++, C#, Python
Santa Clara, CA|Other
Marvell Technology
Staff Software Engineer - C++, C#, Python
Santa Clara, CA|Other
Marvell Technology
Sr. Staff Software/Firmware Engineer - MCU development
Santa Clara, CA|Embedded
Marvell Technology
Senior Staff Design Engineer
Santa Clara, CA|Other
Marvell Technology
Vice President Hyperscaler Global Account Manager
Santa Clara, CA|Other
Marvell Technology
Senior Staff Physical Verification CAD engineer
Santa Clara, CA|Verification
Marvell Technology
Principal Engineer, Digital IC Design
Toronto, Canada|Other
Marvell Technology
Principal Timing Engineer
Toronto, Canada|Other
Marvell Technology
Director Engineering
Hyderabad|Other
Marvell Technology
Engineering IP Program Manager, Principal
Bangalore|Other
Marvell Technology
Analog IC Design Engineer, Senior Staff Engineer
Singapore|Analog/MS
Marvell Technology
Principal Emulation Engineer
2 Locations|Other
Marvell Technology
Sr. Staff Engineer, Packaging Engineering
Hsinchu City|Other
Marvell Technology
Staff Hardware Engineer, Optics
Santa Clara, CA|Other
Marvell Technology
Director, High Speed SerDes Application Engineering
US-CA - Santa Clara|Analog/MS
Marvell Technology
Principal Applications Engineer
Santa Clara, CA|Other
Marvell Technology
RTL Design Principal Engineer
Bangalore|RTL Design
Marvell Technology
Director
Hyderabad|Other
Marvell Technology
Design Verification Senior Staff Engineer
Hyderabad|Verification
Marvell Technology
Principal Engineer - Design Verification
Hyderabad|Verification
Marvell Technology
Sr. Staff Engineer, ASIC Verification - AI/HPC SOCs
3 Locations|Verification
Marvell Technology
Principal Engineer- CAD/EDA Tools & Design Automation Engineer
Bangalore|CAD/EDA
Marvell Technology
Principal Engineer, Design Verification
2 Locations|Verification
Marvell Technology
Director Product Marketing
Santa Clara, CA|Other
Marvell Technology
Principal Engineer - Physical Design
Bangalore|Physical Design
Marvell Technology
Principal Engineer, Analog IC Design
Santa Clara, CA|Analog/MS
Marvell Technology
Advanced Package Technology, Distinguished Engineer
3 Locations|Other
Marvell Technology
Principal Program Manager (Hyperscaler Cloud Data Center - full lifecycle program ownership)
3 Locations|Other
Marvell Technology
Senior Staff Engineer, RTL ASIC Design
Bangalore|RTL Design
Marvell Technology
Senior Principal Engineer -RTL
Bangalore|RTL Design
Marvell Technology
Senior Staff Engineer - AMS IP Verification
Bangalore|Verification
Marvell Technology
Senior Distinguished Engineer
Santa Clara, CA|Other
Marvell Technology
Advanced Packaging Senior Engineer
Bucharest, Romania|Other
Marvell Technology
Senior / Principal Applications Engineer – Advance Packaged Optics (CPO)
Santa Clara, CA|Other
Marvell Technology
Digital IC Design/Verification Engineer
Cordoba, Argentina|Verification
Marvell Technology
Software Developer Engineer in Test
Cordoba, Argentina|Other
Marvell Technology
Director, Design Verification
Santa Clara, CA|Verification
Marvell Technology
Memory Layout Staff Engineer
Bangalore|Other
Marvell Technology
Senior Principal Engineer, Chip Lead, Photonic Fabric Chiplet
Santa Clara, CA|Other
Marvell Technology
Sr. Principal Engineer, Manufacturing Infrastructure
2 Locations|Other
Marvell Technology
Staff Firmware Engineer - memory constrained embedded system development/data center interconnectivity
Ottawa, Canada|Embedded
Marvell Technology
Principal Product Engineer - AI Cloud & Data Center
Santa Clara, CA|Other
Marvell Technology
Senior Principal Product Engineer
Santa Clara, CA|Other
Marvell Technology
Inside Sales Representative
2 Locations|Other
Marvell Technology
Director, Legal, Compliance & Workplace Applications
Santa Clara, CA|Other
Marvell Technology
Senior Principal Engineer- HBM PHY
Bangalore|Other
Marvell Technology
Senior Principal Analog Lead – HBM PHY
Bangalore|Analog/MS
Marvell Technology
Director Analog Mixed Signal Design - Optical
Westlake Village, CA|Analog/MS
Marvell Technology
Analog Modeling & Testing Engineer Intern
Cordoba, Argentina|Analog/MS
Marvell Technology
Analog Design Intern
Cordoba, Argentina|Analog/MS
Marvell Technology
Hardware & Silicon Validation Senior Principal Engineer
Santa Clara, CA|Other
Marvell Technology
Software Engineering Director - Switching/Routing, Layer 1, PHY, Kernel, Platform area
Santa Clara, CA|Other
Marvell Technology
Senior Staff Engineer - Design Verification - Ethernet
Pune|Verification
Marvell Technology
Principal Technical Analyst – Supply Operations & Planning
2 Locations|Other
Marvell Technology
Principal Design Verification Engineer
Santa Clara, CA|Verification
Marvell Technology
Photonics Chip Lead
3 Locations|Other
Marvell Technology
Digital IC Design Junior Engineer
Cordoba, Argentina|Other
Marvell Technology
Senior Staff Design Verification Engineer
Toronto, Canada|Verification
Marvell Technology
Senior Staff Design Engineer - PCIE/CXL Subsystem COE
Irvine, CA|Other
Marvell Technology
Senior Staff Design Verification Engineer – PCIE/CXL Sub-System
2 Locations|Verification
Marvell Technology
Senior Staff Design Verification Engineer – Memory Sub-System (LPDDR/DDR/HBM )
Santa Clara, CA|Verification
Marvell Technology
Senior Staff Design Verification Engineer – Memory Sub-System
Santa Clara, CA|Verification
Marvell Technology
System Level Electrical Validation Engineer
Yokneam|Other
Marvell Technology
System Validation Senior Staff Engineer
Yokneam|Other
Marvell Technology
Analog Layout Engineer
Singapore|Analog/MS
Marvell Technology
Post Silicon Validation Engineer
Cordoba, Argentina|Other
Marvell Technology
Coherent DSP Architecture Intern
Cordoba, Argentina|Other
Marvell Technology
Digital Design Verification Intern
Cordoba, Argentina|Verification
Marvell Technology
Staff Quality & Reliability Engineer - Program Manager
Santa Clara, CA|Other
Marvell Technology
Embedded System Intern for Pre-Silicon Validation
Cordoba, Argentina|Embedded
Marvell Technology
Package Development, Signal Integrity and Power Integrity Engineer, Senior Staff
Austin, TX|Other
Marvell Technology
DSP Architecture Engineer
Pavia, Italy|Other
Marvell Technology
Engineering Program Manager / Project Manager
US-CA - Irvine|Other
Marvell Technology
Software/Firmware Engineering - Intern
Cordoba, Argentina|Embedded
Marvell Technology
Senior Analog Layout Engineer
Singapore|Analog/MS
Marvell Technology
Principal Optical Engineer - Light Sources
3 Locations|Other
Marvell Technology
Digital IC Design Intern
Cordoba, Argentina|Other
Marvell Technology
Senior Staff Firmware Engineer - - memory constrained embedded system development/data center interconnectivity
Santa Clara, CA|Embedded
Marvell Technology
Engineering Program Manager / Project Manager
Pavia, Italy|Other
Marvell Technology
Forward Error Correction Intern
Cordoba, Argentina|Other
Marvell Technology
Forward Error Correction Engineer
Cordoba, Argentina|Other
Marvell Technology
Principal Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis
San Diego, CA|Other
Marvell Technology
Principal Engineer, ASIC/VLSI Synthesis and Design
San Diego, CA|Other
Marvell Technology
Staff Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis
San Diego, CA|Other
Marvell Technology
Staff Engineer, ASIC/VLSI Synthesis and Design
San Diego, CA|Other
Marvell Technology
Senior Staff Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis
San Diego, CA|Other
Marvell Technology
Senior Staff Engineer, ASIC/VLSI Synthesis and Design
San Diego, CA|Other
Marvell Technology
Staff Applications Engineer
Santa Clara, CA|Other
Marvell Technology
Firmware Engineer
Pavia, Italy|Embedded
Marvell Technology
Analog Layout Manager
2 Locations|Analog/MS
Marvell Technology
Senior Principal Engineer, Micro-architecture and RTL
Santa Clara, CA|RTL Design
Marvell Technology
Analog Layout Manager
Pavia, Italy|Analog/MS
Marvell Technology
Senior Communications Leader
Santa Clara, CA|Other
Marvell Technology
Senior Principal Digital IC Design Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Staff Firmware Engineer - design, verification, and, validation, integration of high speed optical components.
Westlake Village, CA|Verification
Marvell Technology
Employee Relations Specialist
2 Locations|Other
Marvell Technology
Senior Staff Reliability Engineer
Santa Clara, CA|Other
Marvell Technology
Senior HRIS Business Analyst
Cordoba, Argentina|Other
Marvell Technology
Power Integrity Engineer - Advanced Packaging
Bucharest, Romania|Other
Marvell Technology
Staff/Senior Staff Software Development Engineer (C/C++, Network Drivers, Data plane, Crypto, Compiler)
Bangalore|Other
Marvell Technology
Principal Product Engineer – AI Cloud & Data Center
Santa Clara, CA|Other
Marvell Technology
Hardware & Silicon Validation Director
Santa Clara, CA|Other
Marvell Technology
Senior Staff Hardware Design Engineer - high-speed PCB-level design and signal integrity implementation
Santa Clara, CA|Other
Marvell Technology
Staff Mechanical Design Engineer
3 Locations|Other
Marvell Technology
Sr. Staff Thermo-Mechanical Engineer
3 Locations|Other
Marvell Technology
Principal Professional – Oracle EBS / Oracle Cloud Supply Chain (Technical, AI, and High-Tech Industry Expertise)
Cordoba, Argentina|Other
Marvell Technology
Embedded Software Senior Staff Engineer
Madrid|Embedded
Marvell Technology
Senior Staff Engineer, Analog Layout
Singapore|Analog/MS
Marvell Technology
Staff Engineer, Analog Layout
Singapore|Analog/MS
Marvell Technology
Sr Staff Manager - Physical Design
Bangalore|Physical Design
Marvell Technology
Senior Principal Engineer, Architecture ASIC / System
2 Locations|Other
Marvell Technology
Analog Layout Senior Engineer
Bangalore|Analog/MS
Marvell Technology
Analog Layout Senior Staff Engineer
Bangalore|Analog/MS
Marvell Technology
Analog Layout Staff Engineer
Bangalore|Analog/MS
Marvell Technology
Sr Principal Program Manager
2 Locations|Other
Marvell Technology
Principle Validation and Hardware Design Engineer
Santa Clara, CA|Other
Marvell Technology
Analog Design Intern - Master's Degree (Quarter Schools / Fall 2026 Start Dates)
Westlake Village, CA|Analog/MS
Marvell Technology
Lead Analog Design Engineer (Principal)
Santa Clara, CA|Analog/MS
Marvell Technology
Director of Test – Silicon Photonics
Santa Clara, CA|Other
Marvell Technology
Systems Application Engineer - Early Career
Santa Clara, CA|Other
Marvell Technology
Digital Design Engineer, Senior Staff
CA-ON - Toronto - TOR|RTL Design
Marvell Technology
Engineering IP Program Manager, Sr. Principal
2 Locations|Other
Marvell Technology
Senior Staff Validation Engineer
IN - Bangalore|Other
Marvell Technology
Principal Validation Engineer
2 Locations|Other
Marvell Technology
Director of Design Verification
2 Locations|Verification
Marvell Technology
Senior Compensation Business Partner
2 Locations|Other
Marvell Technology
Global Compensation Program and Tools Manager
2 Locations|Other
Marvell Technology
Staff Data Science Engineer - Hardware & Silicon Validation
Santa Clara, CA|Other
Marvell Technology
Senior Manager, FP&A
2 Locations|Other
Marvell Technology
Senior Financial Analyst - Global Workplace Solutions
2 Locations|Other
Marvell Technology
Director, Procurement Center of Excellence
Santa Clara, CA|Other
Marvell Technology
ASIC Architecture Intern
Petah-Tikva|Other
Marvell Technology
Staff Engineer, Firmware Development
Osaka|Embedded
Marvell Technology
High Speed PCB Senior Staff Layout Designer (RF / Optics)
Ottawa, Canada|Other
Marvell Technology
Staff Engineer, Hardware Application Engineering — Lab Operations
Santa Clara, CA|Other
Marvell Technology
Senior Principal Engineer, Hardware Application Engineering — Signal Integrity & Power Integrity
Santa Clara, CA|Other
Marvell Technology
Senior Principal Engineer, Hardware Application Engineering — Board & System Design
Santa Clara, CA|Other
Marvell Technology
Principal PHY SerDes Validation Engineer
Santa Clara, CA|Analog/MS
Marvell Technology
Engineering Program Manager
3 Locations|Other
Marvell Technology
Senior Staff Test Engineer
Singapore|Other
Marvell Technology
Senior Staff/Principal SQA Engineer (Firmware/Embedded Testing, C/C++, Python/Bash)
IN - Hyderabad|Embedded
Marvell Technology
Principal Hardware Engineer, Optics
San Diego, CA|Other
Marvell Technology
Staff Hardware Engineer, Optics
San Diego, CA|Other
Marvell Technology
Principal Foundry Tapeout Engineer
Santa Clara, CA|Other
Marvell Technology
Package Layout Design Senior Staff Engineer
Bangalore|Other
Marvell Technology
Hardware Design Engineer, Optical Validation
Hsinchu City|Other
Marvell Technology
ATE Test Hardware Engineer
Santa Clara, CA|Other
Marvell Technology
Staff Professional for Procurement
Santa Clara, CA|Other
Marvell Technology
Global L&D Program Manager – APAC
Singapore|Other
Marvell Technology
Product Management Lead - Hyperscale Custom Silicon
3 Locations|Other
Marvell Technology
Sr. Staff Analog/Mixed-Signal Design Engineer
Westlake Village, CA|Analog/MS
Marvell Technology
Technical Program Manager - Central CAD & Design Services
Santa Clara, CA|CAD/EDA
Marvell Technology
Advanced Package Technology, Principal Engineer
3 Locations|Other
Marvell Technology
Design Verification, Senior Staff Engineer
Ho Chi Minh|Verification
Marvell Technology
Senior Staff Engineer - Validation
Ho Chi Minh|Other
Marvell Technology
System Hardware (SIPI) Engineer, Principle
Ho Chi Minh|Other
Marvell Technology
System Hardware (SIPI) Engineer, Staff
Ho Chi Minh|Other
Marvell Technology
China Distribution Manager
2 Locations|Other
Marvell Technology
Senior Staff Verification Engineer
Santa Clara, CA|Verification
Marvell Technology
Principal Engineer - Verification / AMS / SerDes
Bangalore|Verification
Marvell Technology
Staff Engineer (L1, L2, L3 Testing, NOS/SDK testing, Python Automation)
Bangalore|Other
Marvell Technology
Associate Workplace Specialist
Austin, TX|Other
Marvell Technology
Senior Staff Digital Design Engineer
Irvine, CA|RTL Design
Marvell Technology
Principal Engineer, IP Program Management - CCS
3 Locations|Other
Marvell Technology
Engineering Laboratory Technician - Early Career
Ottawa, Canada|Other
Marvell Technology
Principal Optical Product Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Engineer, Design Verification
Westborough, MA|Verification
Marvell Technology
Staff Engineer, Design Verification
Westborough, MA|Verification
Marvell Technology
Staff Engineer, Design Verification
Santa Clara, CA|Verification
Marvell Technology
Staff Validation Engineer, Photonic Fabric
Santa Clara, CA|Other
Marvell Technology
Senior Staff Engineer, Design Verification
Santa Clara, CA|Verification
Marvell Technology
Senior Staff Engineer, Design Verification
Santa Clara, CA|Verification
Marvell Technology
Staff Engineer, Design Verification
Santa Clara, CA|Verification
Marvell Technology
Analog IC Design Engineer
Bangalore|Analog/MS
Marvell Technology
Senior Staff Engineer, Design Verification
Morrisville, NC|Verification
Marvell Technology
Principal Engineer, Design Verification
Westborough, MA|Verification
Marvell Technology
Hardware & Silicon Validation Principal Engineer
Santa Clara, CA|Other
Marvell Technology
Software Engineer
Taipei|Other
Marvell Technology
Silicon Photonic Design Engineer
CH - Adliswil|Other
Marvell Technology
Silicon Photonics Design, Principal Engineer
CH - Adliswil|Other
Marvell Technology
Design Verification Engineer - Early Career
Ottawa, Canada|Verification
Marvell Technology
Senior Network Architect
Santa Clara, CA|Other
Marvell Technology
Senior Manager, Analog Layout Design
Santa Clara, CA|Analog/MS
Marvell Technology
Enterprise Crisis Management Owner
3 Locations|Other
Marvell Technology
Digital IC Design Intern
Cordoba, Argentina|Other
Marvell Technology
Supply Chain Program Manager
Santa Clara, CA|Other
Marvell Technology
Site HR Manager
Burlington, VT|Other
Marvell Technology
Package Reliability Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Software Engineer (Linux Kernel - Networking)
2 Locations|Other
Marvell Technology
Hardware & Silicon Validation, Senior Staff Engineer
TW - Hsinchu|Other
Marvell Technology
Hardware & Silicon Validation Engg
Pune|Other
Marvell Technology
Staff Engineer • Custom Solutions Engineering - SoC
Pune|SoC
Marvell Technology
Package Development, Signal Integrity and Power Integrity Staff to Senior Staff Engineer
Bangalore|Other
Marvell Technology
Package Layout Design Senior Staff Engineer
Bangalore|Other
Marvell Technology
Package Design Staff to Senior Staff Engineer
Bangalore|Other
Marvell Technology
DSP Architect
Santa Clara, CA|Other
Marvell Technology
T4 - Hardware & Silicon Validation Senior Staff Engineer
Santa Clara, CA|Other
Marvell Technology
Sr. L&D Specialist for APAC Region
Ho Chi Minh|Other
Marvell Technology
Senior Principal Software/Firmware Engineer - Optical PHY
Santa Clara, CA|Embedded
Marvell Technology
Principal Product Engineer - NPI (CPO and Optical Pluggables)
4 Locations|Other
Marvell Technology
Senior Staff Coherent DSP Applications Engineer
Santa Clara, CA|Other
Marvell Technology
Software Engineer Intern
Madrid|Other
Marvell Technology
Senior Staff Engineer, Firmware Development
2 Locations|Embedded
Marvell Technology
Principal Engineer - Subsystem CoE Emulation
Bangalore|Other
Marvell Technology
AVP , Chief Of Staff & Business Operations, Data Center Networking Groups
Santa Clara, CA|Other
Marvell Technology
Sr. Distinguished Engineer, Data Center Management & Control Plane
Santa Clara, CA|Other
Marvell Technology
Digital IC Design Engineer - Early Career
Westborough, MA|Other
Marvell Technology
Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026)
Santa Clara, CA|Verification
Marvell Technology
Program Inventory Ops/Analyst
2 Locations|Other
Marvell Technology
Sr Staff Engineer Program Manager
2 Locations|Other
Marvell Technology
Sr Principal Program Manager
2 Locations|Other
Marvell Technology
Test Engineering Director
Santa Clara, CA|Other
Marvell Technology
Senior Principal Test Engineer
Santa Clara, CA|Other
Marvell Technology
Senior Engineer, Data Solutions Engineering
Singapore|Other
Marvell Technology
Staff Applications Engineer
Santa Clara, CA|Other
Marvell Technology
Analog IC Design Engineer, Senior Principal Engineer
Toronto, Canada|Analog/MS
Marvell Technology
Senior Financial Analyst
2 Locations|Other
Marvell Technology
Design Verification Engineer Intern - Fall 2026
Ottawa, Canada|Verification
Marvell Technology
Director, Custom Silicon Solutions and Program Strategy
2 Locations|Other
Marvell Technology
Senior Equipment Engineer
Singapore|Other
Marvell Technology
Sr. Staff Test Engineering Manager
Santa Clara, CA|Other
Marvell Technology
Principal Engineer - Item Master
Santa Clara, CA|Other
Marvell Technology
Sr Staff NPI Supply Chain Planning
Singapore|Other
Marvell Technology
Senior SW Embedded Engineer
Petah-Tikva|Embedded
Marvell Technology
Staff Firmware/Software Engineer- Embedded SoC/Microcontroller/DSP/SERDES/AEC/Microled/ODSP/PHY/AI Connectivity
Santa Clara, CA|Analog/MS
Marvell Technology
Associate Vice President, Chief of Staff & Business Operations, Connectivity
Santa Clara, CA|Other
Marvell Technology
Principal Technical Manager
2 Locations|Other
Marvell Technology
Sr. Staff Optical Product Engineer
Hsinchu City|Other
Marvell Technology
Senior Hardware Program Engineer
Hsinchu City|Other
Marvell Technology
Digital Design Engineer
Irvine, CA|RTL Design
Marvell Technology
Senior Principal Test Engineer
Irvine, CA|Other
Marvell Technology
Principal Test Development Engineer
Santa Clara, CA|Other
Marvell Technology
Principal Test Engineer
Santa Clara, CA|Other
Marvell Technology
Principal Test Engineer
Santa Clara, CA|Other
Marvell Technology
Head of Global People Services
2 Locations|Other
Marvell Technology
Senior Workplace Specialist
San Diego, CA|Other
Marvell Technology
Program Manager, Communications
Santa Clara, CA|Other
Marvell Technology
Director, HR Business Partner
Santa Clara, CA|Other
Marvell Technology
Senior Staff Optical Test Engineer
Hsinchu City|Other
Marvell Technology
Sr. Staff Engineer, Hardware Design, Test Ops
Hsinchu City|Other
Marvell Technology
Senior Staff ESD Compliance Engineer
Hsinchu City|Other
Marvell Technology
Sr. Staff Engineer, Product Engineering
TW - Hsinchu|Other
Marvell Technology
Principal Test Development Engineer (ATE)
Santa Clara, CA|Other
Marvell Technology
Principal Test Development Engineer (ATE)
Santa Clara, CA|Other
Marvell Technology
Staff Supply Chain Planner
Santa Clara, CA|Other
Marvell Technology
Principal Board Product Engineer
2 Locations|Other
Marvell Technology
Senior Sales Account Manager
Santa Clara, CA|Other
Marvell Technology
Senior Staff Engineer, Hardware & Silicon Validation
Ho Chi Minh|Other
Marvell Technology
Senior Staff Manager, Test Engineering
Singapore|Other
Marvell Technology
Senior Staff Optical Validation Engineer
Santa Clara, CA|Other
Marvell Technology
M&A Project Manager
2 Locations|Other
Marvell Technology
Senior Presentation Designer
Santa Clara, CA|Other
Marvell Technology
Senior Graphic Designer
Santa Clara, CA|Other
Marvell Technology
Sr. Talent Advisor
Pavia, Italy|Other
Marvell Technology
Regional EHS Manager - AMEC
2 Locations|Other
Marvell Technology
Assoc. Workplace Specialist
Cordoba, Argentina|Other
Marvell Technology
Connectivity Product Marketing Director- APAC
Shenzhen|Other
Marvell Technology
Staff Digital IC Design Engineer
Ottawa, Canada|Other
Marvell Technology
IP Release Principal Engineer
2 Locations|Other
Marvell Technology
Senior Staff Analog Mixed-Signal Design Engineer
Santa Clara, CA|Analog/MS
Marvell Technology
Principal, Design Verification Engineer, Secure Root of Trust
Santa Clara, CA|Verification
Marvell Technology
Senior Staff- IP RTL Design Engineer
Bangalore|RTL Design
Marvell Technology
Staff Analog Design Engineer
Bangalore|Analog/MS
Marvell Technology
Staff Application Engineer — HDD SoC
Santa Clara, CA|SoC
Marvell Technology
Executive Administrative Assistant
Santa Clara, CA|Other
Marvell Technology
Principal Product Engineer - AI Cloud & Data Center; Platform Transformation Lead
Santa Clara, CA|Other
Marvell Technology
Head of Physical Security
Santa Clara, CA|Other
Marvell Technology
Co-Packaged Optics Packaging Process Development Engineer
Santa Clara, CA|Other
Marvell Technology
Optical Systems Engineer – Data Center Hardware
Santa Clara, CA|Other
Marvell Technology
Sr. Director, Product & Technology Marketing— Optical & Data Center Systems
2 Locations|Other
Marvell Technology
Test Engineer (Early Career)
Singapore|Other
Marvell Technology
Sr. Director, Product & Technology Marketing— Connectivity Components & Ecosystem
2 Locations|Other
Marvell Technology
Sr. Director, Product & Technology Marketing— Custom Cloud & XPU Solutions
2 Locations|Other
Marvell Technology
Senior Staff Product Engineer
Singapore|Other
Marvell Technology
Trade Compliance Analyst
3 Locations|Other
Marvell Technology
Site HR Manager
Toronto, Canada|Other
Marvell Technology
Analog Layout Engineer
Cordoba, Argentina|Analog/MS
Marvell Technology
Architecture ASIC Engineer
Cordoba, Argentina|Other
Marvell Technology
Senior Staff Testing Engineer
Westlake Village, CA|Other
Marvell Technology
Electro-optical Signal Integrity, Principal Engineer
CH - Adliswil|Other
Marvell Technology
Sr. Director, Market Intelligence & Analyst Relations
2 Locations|Other
Marvell Technology
Senior Staff Manager, Physical Design
Hsinchu City|Physical Design
Marvell Technology
Senior Principal Engineer Analog Design (HBM PHY)
Bangalore|Analog/MS
Marvell Technology
Principal Analog Design Engineer
Bangalore|Analog/MS
Marvell Technology
Analog Layout Principal Engineer
Pavia, Italy|Analog/MS
Marvell Technology
Import Analyst
Santa Clara, CA|Other
Marvell Technology
Staff Product Engineer
Singapore|Other
Marvell Technology
Principal Engineer, Physical Design
Hsinchu City|Physical Design
Marvell Technology
Senior Staff ASIC CAD Flow Infrastructure Engineer
Austin, TX|CAD/EDA
Marvell Technology
Staff CAD Engineer
Austin, TX|CAD/EDA
Marvell Technology
Senior Staff CAD Engineer
Austin, TX|CAD/EDA
Marvell Technology
Hardware & Silicon Validation Senior Staff Engineer
2 Locations|Other
Marvell Technology
Sr. Principal Engineer, RTL ASIC Design
Hyderabad|RTL Design
Marvell Technology
Senior Staff Physical Verification CAD Engineer
Singapore|Verification
Marvell Technology
Senior Corporate Accounting Analyst
2 Locations|Other
Marvell Technology
Staff Design Verification Engineer, UAL and PCIe Subsystems
Santa Clara, CA|Verification
Marvell Technology
Senior Staff Analog and Mixed-Signal IC Design Engineer
Irvine, CA|Analog/MS
Marvell Technology
Senior Staff Applications Engineer
Santa Clara, CA|Other
Marvell Technology
(Sr.) Staff Engineer, Analog IC Design
Hsinchu City|Analog/MS
Marvell Technology
Senior Staff Product Engineer, Optics
Hsinchu City|Other
Marvell Technology
Director, Service Provider & Carrier Sales
Remote - US - CA|Other
Marvell Technology
Sr Staff Analog Layout Engineer
San Diego, CA|Analog/MS
Marvell Technology
Principal Analog Layout Engineer
San Diego, CA|Analog/MS
Marvell Technology
Senior Staff Analog and Mixed Signal Engineer
Westlake Village, CA|Analog/MS
Marvell Technology
Principal Optical Engineer
Singapore|Other
Marvell Technology
Staff CAD Engineer (PSI)
Bangalore|CAD/EDA
Marvell Technology
Digital IC Design Engineer
Cordoba, Argentina|Other
Marvell Technology
Sr. Staff RTL Design Engineer - PCIe
Bangalore|RTL Design
Marvell Technology
Principal Engineer, Subsystem CoE Emulation
Bangalore|Other
Marvell Technology
Senior Staff Test Engineer
Singapore|Other
Marvell Technology
Senior Engineer, DFT
Ho Chi Minh|DFT
Marvell Technology
Director of Sales - Account Management
Santa Clara, CA|Other
Marvell Technology
Director Customer Support - US Customer Solutions Group
Santa Clara, CA|Other
Marvell Technology
Senior Principal Software Applications Engineer
Santa Clara, CA|Other
Marvell Technology
Co-Packaged Optics Process Development NPI engineer
Santa Clara, CA|Other
Marvell Technology
Engineer, Design Verification
Pune|Verification