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About This Role
- Defines, architects, and documents verification strategy and methodologies for implementing and verifying the silicon design in the most optimal manner.
- Architects the testbenches and develops universal verification methodology (UVM) or formal based verification approaches.
- Integrates the block testbench in chiplevel UVM environment and verifies integration.
- Develops test strategy, test bench architecture, and test plans for design blocks to conform to specifications.
- Enables interaction with analog and digital teams and supports postsilicon validation activities.
- Collaborates with the architecture and design team to create random test generation plans, runs functional simulation to identify gaps in design specification, and conducts failure analysis, coverage analysis, and closure.
- Defines and develops the security validation strategy and validation infrastructure to incorporate security tools and methods to improve security coverage.
Requirements
- to be initially considered for this position.
- Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and/or internship experience.
Requirements
- Bachelor's degree in Electronics, Computer Engineering, or related field and at least 6+ years of experience OR a Master's degree in the mentioned fields with 4+ years of experience in silicon design development, frontend validation methodologies, simulation environment development (testbench, checker), and simulation/emulation debugging.
- Proficiency in functional and code coverage closures.
- Expertise in hardware simulation and validation tools, with strong technical proficiency in C/C++/Python and SystemVerilog.
- Familiarity with IP validation tools, processes, and protocols.
Nice to Have
- Experience with OVM/UVM-based test benches and formal verification tools.
- Deep knowledge of graphics architecture and designs, with an understanding of microarchitectural features.
- Strong team collaboration skills, problem-solving ability, and attention to detail.
- Desire to work on high-impact projects that challenge and expand your technical capabilities.
- Take the next step in your career and join a team where innovation, collaboration, and growth are part of the daily experience.
- Apply now to make a meaningful impact and drive the future of technology at Intel.
- Interview Tips: https://www.intel.com/content/www/us/en/jobs/hiring.html Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: US, California, Santa Clara Business group: At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers.
- We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems.
- Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership.
- Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
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₹5-12 LPA to ₹40-70 LPA
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Job ID
/job/US-California-Folsom/Design-Verification-Architect_JR0285404
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