Packaging Thermal Engineer

About This Role

• The external Packaging and Assembly Engineering team (EPAE) plays a critical role in leveraging external assembly technologies to deliver leadership products.
• We are seeking a Thermal Engineer to perform Thermal analysis for advanced semiconductor packaging solutions, using a tool chain from layout extraction, thermal simulation by CFD solver, and thermal measurement validation.
• Packaging thermal design optimization as well as correlation of simulation with measurement results.
• This role will assess thermal performance through highly interacting with internal product design and pathfinding engineers on one end and assessing external suppliers on the other.
• Design and Develop Thermal Test Vehicle (TTV) from design concept, hardware implementation to experimental validation.
• Architect product design by providing thermal simulation and measurement validation.
• Scout technology roadmap to identify thermal innovations and contribute to product architect.
• Support thermal-mechanical simulation.
• Key Responsibilities: Thermal Test Vehicle (TTV) Design and Development Architect and design thermal test vehicles to mimic realistic chip/package power distributions.
• Define heater layouts, and sensing strategies for correlation accuracy.
• Lead end-to-end execution: Concept to design to fabrication to validation.
• Model-to-Hardware Correlation Establish robust methodologies for correlating CFD/thermal simulations with experimental data.
• Perform sensitivity studies and calibration to minimize simulation vs measurement deviations.
• Compact / Reduced-Order Thermal Model Development Develop and deliver compact thermal models (CTMs) or reduced-order models (ROMs) for Package-and system level cases.
• Ensure models accurately represent dynamic and steady-state thermal behavior.
• Collaborate with internal business units to: Customize models for specific chip power use cases.
• Support integration into system simulation environments.