Principal Engineer, Physical Design

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About This Role

  • Lead Structural Design / physical design Implementation of Custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. • Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. • Conducts verification and signoff, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. • Analyzes results and makes recommendations to fix violations for current and future product architecture. • Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. • Optimizes design to improve product level parameters such as power, frequency, and area. • Participates in the development and improvement of physical design methodologies and flow automation.

Requirements

  • Bachelor's/master's degree in electrical / computer engineering, Computer Science, or in a STEM related field of study. • Experience in leading small team of engineers.• 14+ years of experience with complex ASIC/SOC Implementation. • Experience in system and processor architecture. • Experience designing and implementing complex blocks like CPUs, GPU, Media blocks, and Memory controller. • Experience with SystemVerilog/SOC development environment. • Experience in scripting languages (i.e.
  • PERL, TCL, or Python). • Experience with Hardware validation techniques (i.e., formal Verification, Test and Function Verification).

Nice to Have

  • Post graduate degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study. • Experience with Industry standard protocols (i.e.
  • PCIE, USB, DRR, etc) • Experience with interaction of computer hardware with software • Experience with Low power/UPF implementation/verification techniques. • Experience with Timing Analysis / Physical Verification / Formal verification techniques.

Tools & Skills

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IN

Intel

India, Bangalore

Specialisation
Salary range
₹5-11 LPA to ₹38-65 LPA
Open roles at Intel
49 positions
Job ID
/job/India-Bangalore/Principal-Engineer--Physical-Design_JR0279627

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