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About This Role
- The Role and Impact As a Product Development Engineer - Scan Diagnostics, you will play a core role in shaping Intel's product innovation and manufacturing excellence.
- Your efforts will be pivotal in transforming cutting-edge integrated circuits from design feasibility to high-volume production.
- This role offers exceptional learning and growth opportunities, providing broad exposure to the entire semiconductor product lifecycle, from initial definition to HVM.
- By collaborating with cross-functional teams, you will influence product design, ensure seamless production ramp-up, and directly contribute to delivering world-class solutions to Intel's customers.
- You'll engage in advanced diagnostic techniques for fault identification and yield improvement, collaborating with stakeholders across the company and our supplier ecosystem.
- Key Responsibilities Create, Enable and Support Scan/Chain Diagnosis infrastructure and processes for Intel's HVM products.
- Support fail-based and volume diagnostic analysis and yield analysis requests to drive continuous yield improvement.
- Support CAD infrastructure and computational resources for Diagnostics across all HVM product lines.
- Develop and optimize tools, methods, and flows for Design for Test (DFT), diagnostics, and yield analysis.
- Collaborate with external vendors and internal teams to establish standard industry practices for diagnostics and yield analysis.
- Maintain relationships with Electronic Design Automation (EDA) vendors to access the latest tools and methodologies.
- Facilitate knowledge transfer to ensure Yield Management and Failure Analysis team members are updated with the latest methodologies and tools.
- Define and monitor DFX quality metrics (coverage, test cost, and debuggability) from development to production ramp-up.
- Work closely with Design and New Product Introduction (NPI) teams to ensure diagnostic readiness for new products.
Requirements
- Candidate must possess at least a bachelor's degree in engineering or related field.
- Master's degree or Ph.D. preferred. 4+ years of experience in DFT, Scan Diagnostics enablement, Post-Si diagnostics debug, Yield Analysis, and/or EDA tools.
- Proficiency in at least one of the following: Python, TCL, C-Shell, or PERL scripting.
- Seeking candidates with strong communication and teamwork skills.
Nice to Have
- Experience with Siemens's Tessent Test and Yield Analysis tools or similar.
- Experience with Synopsys's Yield Explorer or similar tools.
- Experience with SOC / IP DFT control architecture (e.g., JTAG, IJTAG, IEEE1500).
- Experience in Custom and/or ASIC circuit design.
- We are looking for innovators and problem-solvers to join our team and help us continue to redefine the future of technology.
- If you are passionate about making an impact and growing your career in a dynamic and collaborative environment, apply now.
Benefits
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
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Specialisation
Salary range
₹5-10 LPA to ₹35-58 LPA
Open roles at Intel
674 positions
Job ID
/job/US-California-Santa-Clara/Product-Development-Engineer---Scan-Diagnostics_JR0284762-1
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