DFT (Design for Test) Jobs in India
103 open dft (design for test) positions at Micron Technology, NVIDIA, NXP Semiconductors, Marvell Technology and more. Sourced directly from company career pages.
Micron Technology(29)NVIDIA(21)NXP Semiconductors(15)Marvell Technology(9)Analog Devices(7)Cadence Design Systems(5)
Cadence Design Systems
Principal DFT Design Engineer
BANGALORE|DFT
NXP Semiconductors
Senior Principal DFT Engineer
Pune|DFT
Marvell Technology
Staff to Senior Staff Engineer, DFT
Bangalore|DFT
GlobalFoundries
Sr Staff Engineer DFT
IND - Karnataka - Bengaluru - Central|DFT
Broadcom
ASIC DFT Engineer
USA-CA San Jose Innovation Drive|DFT
NXP Semiconductors
Sr. DFT Engineer
Pune|DFT
Micron Technology
DFT Engineer (Design for Testability) - Staff
Richardson, TX|DFT
Micron Technology
DRAM Product Engineer - LPDDR Design for Test
Taichung - Fab 16, Taiwan|DFT
Micron Technology
Photolithography Scanner DUV Equipment Engineer
Hiroshima - Fab 15, Japan|DFT
Micron Technology
DRAM Product Engineer - Module/ATE DFT
Taichung - Fab 16, Taiwan|DFT
Micron Technology
Frontend Organizations Central Team, Staff / Principal Photo Scanner Engineer
Fab 10A, Singapore|DFT
Micron Technology
HVM Photo Scanner MTS
Taichung - Fab 16, Taiwan|DFT
Intel
DFT Application Engineer
3 Locations|DFT
Broadcom
ASIC DFT Engineer
USA-California-San Jose-1320 Ridder Park Drive|DFT
NVIDIA
Senior DFT Engineer - LPU
6 Locations|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior Design-for-Test Engineer, ATPG
2 Locations|DFT
NVIDIA
Senior DFT Design Engineer
2 Locations|DFT
NVIDIA
Senior Software Engineer, Real-Time AI and Rendering - Holoscan SDK
US, CA, Santa Clara|DFT
Cadence Design Systems
Lead Hardware Engineer - DFT IP R&D
2 Locations|DFT
Cadence Design Systems
Senior DFT Engineer
2 Locations|DFT
NXP Semiconductors
Principal DFT Engineer
Pune|DFT
NXP Semiconductors
Principal DFT Engineer
2 Locations|DFT
NXP Semiconductors
2026 Campus - SoC DFT Engineer
Tianjin (Teda)|DFT
Marvell Technology
Senior Staff Engineer, Design For Test - Automation & Infrastructure
Ottawa, Canada|DFT
Marvell Technology
DFT Manager
Ottawa, Canada|DFT
Marvell Technology
Principal Engineer - Design For Test (DFT)
2 Locations|DFT
Marvell Technology
Senior Staff DFT Engineer
Santa Clara, CA|DFT
Marvell Technology
Staff DFT Engineer
Santa Clara, CA|DFT
Marvell Technology
DFT Principal Engineer
2 Locations|DFT
KLA Corporation
Senior Director - Strategic Marketing (Surfscan Group Portfolio)
2 Locations|DFT
Micron Technology
Photolithography 設備エンジニア (DUV Scanner)
Hiroshima - Fab 15, Japan|DFT
Micron Technology
Senior Photo Process Engineer - Scanner Metrology
Boise, ID - ID1|DFT
Micron Technology
Senior Photo Process Engineer - Scanner Application
Boise, ID - Main Site|DFT
Micron Technology
SR ENGINEER, DDEG DESMETH DFT
Hyderabad - Phoenix Aquila, India|DFT
Micron Technology
SR ENGINEER, DDEG DESMETH DFT
Hyderabad - Phoenix Aquila, India|DFT
Micron Technology
Manager/E4 Lead, Photo Scanner Equipment
Taichung - Fab 16, Taiwan|DFT
Micron Technology
High NA EUV - Scanner Engineer
New York - Remote (B)|DFT
NXP Semiconductors
Senior DfT Engineer
Caen|DFT
Marvell Technology
Senior Manager, DFT
Bangalore|DFT
NVIDIA
Applied AI Engineer - DFT Methodology
India, Bengaluru|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior DFT Engineer - Hardware
India, Bengaluru|DFT
NVIDIA
DFT Engineer - New College Grad
US, CA, Santa Clara|DFT
Analog Devices
Senior DFT Engineer
CLOSED-India, Bangalore, Aveda Meta|DFT
NXP Semiconductors
Sr DFT Engineer
Hyderabad|DFT
Micron Technology
Staff HBM Design Architect - DFT
2 Locations|DFT
NVIDIA
DFT Engineer - Hardware
India, Bengaluru|DFT
GlobalFoundries
DFT Engineer
Richardson|DFT
Micron Technology
Staff SoC DFT Engineer, HBM
Richardson, TX|DFT
Micron Technology
EUV scanner Equipment Engineer
Hiroshima - Fab 15, Japan|DFT
Micron Technology
LPDDR PE Backend DFT Engineer
Hashimoto, Japan|DFT
Micron Technology
LPDDR PE Backend DFT Engineer
Hashimoto, Japan|DFT
Analog Devices
Senior DFT Engineer
India, Bangalore, RMZ|DFT
Analog Devices
Staff DFT Engineer
India, Bangalore, RMZ|DFT
Analog Devices
Staff Engineer – DFT Engineering
India, Bangalore, RMZ|DFT
Micron Technology
Principal Engineer – HBM Design for Test (DFT)
Richardson, TX|DFT
Micron Technology
ENGINEER, SCANNER EQUIPMENT
Taichung - Fab 16, Taiwan|DFT
NVIDIA
Senior DFT Power Methodology Engineer
US, CA, Santa Clara|DFT
KLA Corporation
Sr. Technical Program Manager - Scanning Electron Microscopy
Milpitas, CA|DFT
Micron Technology
SR Engineer, ASIC DFT
Hyderabad - Phoenix Aquila, India|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NXP Semiconductors
Technical Director, DFT
Bangalore|DFT
NXP Semiconductors
Principal DFT Engineer
Austin (Oakhill, Office)|DFT
Analog Devices
Senior Design for Test (DFT) Engineer
Ireland, Limerick|DFT
Analog Devices
Staff Design for Test (DFT) Engineer
Ireland, Limerick|DFT
KLA Corporation
Applications Development Engineer (Surfscan Product)
Singapore, Singapore|DFT
Intel
Product Development Engineer - Scan Diagnostics
3 Locations|DFT
Intel
Staff SOC DFT Engineer
Malaysia, Penang|DFT
NXP Semiconductors
Principal Hardware DFT Lead
2 Locations|DFT
GlobalFoundries
Lead DFT Engineer - MBIST
IND - Karnataka - Bengaluru - North|DFT
Micron Technology
New College Grad - Design Engineer, HBM DFT
Richardson, TX|DFT
Cadence Design Systems
DFT Design Engineer
AUSTIN|DFT
Analog Devices
Principal DFT Engineer
India, Bangalore, RMZ|DFT
Micron Technology
Scanner Equipment Engineer (Photolithography / DUV)
Hiroshima - Fab 15, Japan|DFT
NVIDIA
DFT Engineer
India, Bengaluru|DFT
NVIDIA
Senior DFT Engineer - Hardware
India, Bengaluru|DFT
Broadcom
DFT Engineer
USA-TX-Austin - River Place B7|DFT
NVIDIA
Senior DFT Engineer - Hardware
India, Bengaluru|DFT
NXP Semiconductors
Lead DFT Engineer
Noida|DFT
Intel
DFT Engineer
India, Bangalore|DFT
NXP Semiconductors
Principle DFT Engineer
2 Locations|DFT
Micron Technology
DRAM Product Engineer - LPDDR Design for Test
Taichung - Fab 16, Taiwan|DFT
Micron Technology
Staff/Principal Engineer - HBM Design for Test (DFT)
Richardson, TX|DFT
Micron Technology
Principal DFT Engineer, HBM
Folsom, CA|DFT
Intel
CPU DFT Manager
India, Bangalore|DFT
Micron Technology
MGR, Tainan Photo Scanner Equipment
Tainan, Taiwan|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NXP Semiconductors
Senior DfT Engineer
Chandler (Office)|DFT
NXP Semiconductors
Lead DFT Engineer
Noida|DFT
NXP Semiconductors
Sr. DFT Engineer
Noida|DFT
Broadcom
DFT Engineer
China-Shanghai-Zhangjiang Hi Tech|DFT
Broadcom
DFT Engineer
China-Shanghai-Zhangjiang Hi Tech|DFT
Cadence Design Systems
Principal DFT Engineer
BANGALORE|DFT
Micron Technology
MGR, Tainan Photo Scanner Process
Tainan, Taiwan|DFT
NVIDIA
Senior DFT Power Methodology Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
DFT Methodology Engineer
US, CA, Santa Clara|DFT
Micron Technology
Sr Engineer, SCANNER EQUIPMENT
Taichung - Fab 16, Taiwan|DFT
NVIDIA
Senior ASIC Timing Engineer, DFT
US, CA, Santa Clara|DFT
Marvell Technology
Senior Engineer, DFT
Ho Chi Minh|DFT
KLA Corporation
Applications Development Engineer - SurfScan
Singapore, Singapore|DFT