DFT (Design for Test) Jobs in India
93 open dft (design for test) positions at Micron Technology, NVIDIA, NXP Semiconductors, Broadcom and more. Sourced directly from company career pages.
See DFT (Design for Test) salary bands (India 2026) →NVIDIA
Senior Circuit Silicon Correlation DFT Engineer
India, Bengaluru|DFT
Cadence Design Systems
Principal DFT Design Engineer
BANGALORE|DFT
NXP Semiconductors
Senior Principal DFT Engineer
Pune|DFT
GlobalFoundries
Sr Staff Engineer DFT
IND - Karnataka - Bengaluru - Central|DFT
Broadcom
ASIC DFT Engineer
USA-CA San Jose Innovation Drive|DFT
NXP Semiconductors
Sr. DFT Engineer
Pune|DFT
Micron Technology
DFT Engineer (Design for Testability) - Staff
Richardson, TX|DFT
Micron Technology
DRAM Product Engineer - LPDDR Design for Test
Taichung - Fab 16, Taiwan|DFT
Micron Technology
Photolithography Scanner DUV Equipment Engineer
Hiroshima - Fab 15, Japan|DFT
Micron Technology
Frontend Organizations Central Team, Staff / Principal Photo Scanner Engineer
Fab 10A, Singapore|DFT
Micron Technology
HVM Photo Scanner MTS
Taichung - Fab 16, Taiwan|DFT
Intel
DFT Application Engineer
3 Locations|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior DFT Design Engineer
2 Locations|DFT
NVIDIA
Senior DFT Engineer
2 Locations|DFT
Cadence Design Systems
Lead Hardware Engineer - DFT IP R&D
2 Locations|DFT
Cadence Design Systems
Senior DFT Engineer
2 Locations|DFT
NXP Semiconductors
Principal DFT Engineer
Pune|DFT
NXP Semiconductors
Principal DFT Engineer
2 Locations|DFT
Micron Technology
Photolithography 設備エンジニア (DUV Scanner)
Hiroshima - Fab 15, Japan|DFT
Micron Technology
Senior Photo Process Engineer - Scanner Metrology
Boise, ID - ID1|DFT
Micron Technology
SR ENGINEER, DDEG DESMETH DFT
Hyderabad - Phoenix Aquila, India|DFT
Micron Technology
Manager/E4 Lead, Photo Scanner Equipment
Taichung - Fab 16, Taiwan|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
DFT Engineer - New College Grad
US, CA, Santa Clara|DFT
Analog Devices
Senior DFT Engineer
CLOSED-India, Bangalore, Aveda Meta|DFT
Analog Devices
Senior DFT Engineer
CLOSED-India, Bangalore, Aveda Meta|DFT
NXP Semiconductors
Sr DFT Engineer
Hyderabad|DFT
Micron Technology
Staff HBM Design Architect - DFT
2 Locations|DFT
GlobalFoundries
DFT Engineer
Richardson|DFT
Micron Technology
Staff SoC DFT Engineer, HBM
2 Locations|DFT
Analog Devices
Staff DFT Engineer
India, Bangalore, RMZ|DFT
Micron Technology
Principal Engineer – HBM Design for Test (DFT)
Richardson, TX|DFT
NVIDIA
Senior DFT Power Methodology Engineer
US, CA, Santa Clara|DFT
KLA Corporation
Sr. Technical Program Manager - Scanning Electron Microscopy
Milpitas, CA|DFT
Micron Technology
SR Engineer, ASIC DFT
Hyderabad - Phoenix Aquila, India|DFT
NVIDIA
Senior DFT - Silicon Validation Engineer
US, CA, Santa Clara|DFT
NXP Semiconductors
Principal DFT Engineer
Austin (Oakhill, Office)|DFT
Analog Devices
Staff Design for Test (DFT) Engineer
Ireland, Limerick|DFT
KLA Corporation
Applications Development Engineer (Surfscan Product)
Singapore, Singapore|DFT
NXP Semiconductors
Principal Hardware DFT Lead
2 Locations|DFT
GlobalFoundries
Lead DFT Engineer - MBIST
IND - Karnataka - Bengaluru - North|DFT
Cadence Design Systems
DFT Design Engineer
AUSTIN|DFT
Analog Devices
Principal DFT Engineer
India, Bangalore, RMZ|DFT
Micron Technology
Scanner Equipment Engineer (Photolithography / DUV)
Hiroshima - Fab 15, Japan|DFT
NVIDIA
Senior DFT Engineer - Hardware
India, Bengaluru|DFT
Broadcom
DFT Engineer
USA-TX-Austin - River Place B7|DFT
NVIDIA
Senior DFT Engineer - Hardware
India, Bengaluru|DFT
NXP Semiconductors
Lead DFT Engineer
Noida|DFT
NXP Semiconductors
Principle DFT Engineer
2 Locations|DFT
Micron Technology
Staff/Principal Engineer - HBM Design for Test (DFT)
Richardson, TX|DFT
Micron Technology
Principal DFT Engineer, HBM
2 Locations|DFT
Intel
CPU DFT Manager
India, Bangalore|DFT
Micron Technology
MGR, Tainan Photo Scanner Equipment
Tainan, Taiwan|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NXP Semiconductors
Senior DfT Engineer
Chandler (Office)|DFT
NXP Semiconductors
Lead DFT Engineer
Noida|DFT
NXP Semiconductors
Sr. DFT Engineer
Noida|DFT
Broadcom
DFT Engineer
China-Shanghai-Zhangjiang Hi Tech|DFT
Micron Technology
MGR, Tainan Photo Scanner Process
Tainan, Taiwan|DFT
NVIDIA
Senior DFT Power Methodology Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
DFT Methodology Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior ASIC Timing Engineer, DFT
US, CA, Santa Clara|DFT
KLA Corporation
Applications Development Engineer - SurfScan
Singapore, Singapore|DFT
Intel
DFT Implementation Engineer
US, Texas, Austin|DFT
KLA Corporation
Product Install Engineer -Surfscan Extensive 90% + Travel Required
2 Locations|DFT
KLA Corporation
Applications Development Engineer - Surfscan
Milpitas, CA|DFT
KLA Corporation
Applications Development Engineer - Surfscan
Milpitas, CA|DFT
Micron Technology
High NA EUV - Scanner Engineer
Albany, NY|DFT
Micron Technology
HBM Media Health Product Engineer (DFT)
Boise, ID - Main Site|DFT
Cadence Design Systems
Senior Principal DFT Design Engineer
AUSTIN|DFT
Analog Devices
Senior Design for Test (DFT) Engineer
Ireland, Limerick|DFT
Broadcom
DFT Engineer
ISR-Tel Aviv University|DFT
Micron Technology
ENGINEER, SCANNER EQUIPMENT
Taichung - Fab 16, Taiwan|DFT
Intel
DFT Design Engineer
India, Bangalore|DFT
Analog Devices
Senior DFT Engineer
India, Bangalore, RMZ|DFT
NVIDIA
Senior DFT Methodology - Data Analytics and Applied AI Engineer
US, CA, Santa Clara|DFT
NXP Semiconductors
DfT Technical Student
Catania|DFT
Micron Technology
Senior Engineer - HBM Design for Test (DFT)
Richardson, TX|DFT
Intel
Senior ASIC DFT Engineer
Israel, Haifa|DFT
Broadcom
IC Design Engineer (DFT)
China-Shanghai-Zhangjiang Hi Tech|DFT
Broadcom
DFT Lead Engineer
USA-CA San Jose Innovation Drive|DFT
NVIDIA
Manager, DFT - Post Silicon
2 Locations|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
Micron Technology
EUV scanner Equipment Engineer
Hiroshima - Fab 15, Japan|DFT
NVIDIA
NVIDIA 2027 Internships: Hardware Design for Test (DFT)
US, CA, Santa Clara|DFT
Micron Technology
Staff Scanner Equipment Engineer
Taichung - Fab 16, Taiwan|DFT
Micron Technology
PHOTO Scanner Engineer
Miaoli - Tongluo, Taiwan|DFT
Micron Technology
New College Grad - Engineer - HBM Design for Test (DFT)
Richardson, TX|DFT
Broadcom
DFT Engineer
USA-CA San Jose Innovation Drive|DFT
Intel
DFT Design Engineer
India, Bangalore|DFT