DFT (Design for Test) Jobs in India
88 open dft (design for test) positions at NVIDIA, NXP Semiconductors, Micron Technology, Broadcom and more. Sourced directly from company career pages.
See DFT (Design for Test) salary bands (India 2026) →
NVIDIA
Senior Circuit Silicon Correlation DFT Engineer
India, Bengaluru|DFT|mid
Cadence Design Systems
Principal DFT Design Engineer
BANGALORE|DFT|principal
NXP Semiconductors
Senior Principal DFT Engineer
Pune|DFT|principal
GlobalFoundries
Sr Staff Engineer DFT
IND - Karnataka - Bengaluru - Central|DFT|staff
Micron Technology
Frontend Organizations Central Team, Staff / Principal Photo Scanner Engineer
Fab 10A, Singapore|DFT|staff
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
NVIDIA
Senior DFT Engineer
2 Locations|DFT
Cadence Design Systems
Lead Hardware Engineer - DFT IP R&D
2 Locations|DFT
Cadence Design Systems
Senior DFT Engineer
2 Locations|DFT
NXP Semiconductors
Principal DFT Engineer
Pune|DFT|principal
NXP Semiconductors
Principal DFT Engineer
2 Locations|DFT
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT
Analog Devices
Senior DFT Engineer
CLOSED-India, Bangalore, Aveda Meta|DFT
NXP Semiconductors
Sr DFT Engineer
Hyderabad|DFT|senior
NVIDIA
DFT Engineer - Hardware
India, Bengaluru|DFT
GlobalFoundries
DFT Engineer
Richardson|DFT
Analog Devices
Staff DFT Engineer
India, Bangalore, RMZ|DFT|staff
KLA Corporation
Sr. Technical Program Manager - Scanning Electron Microscopy
Milpitas, CA|DFT
NVIDIA
Senior DFT - Silicon Validation Engineer
US, CA, Santa Clara|DFT
NXP Semiconductors
Principal DFT Engineer
Austin (Oakhill, Office)|DFT
KLA Corporation
Applications Development Engineer (Surfscan Product)
Singapore, Singapore|DFT
Intel
Staff SOC DFT Engineer
Malaysia, Penang|DFT
NXP Semiconductors
Principal Hardware DFT Lead
2 Locations|DFT
GlobalFoundries
Lead DFT Engineer - MBIST
IND - Karnataka - Bengaluru - North|DFT|senior
Cadence Design Systems
DFT Design Engineer
AUSTIN|DFT
Analog Devices
Principal DFT Engineer
India, Bangalore, RMZ|DFT|principal
Broadcom
DFT Engineer
USA-TX-Austin - River Place B7|DFT|senior
NXP Semiconductors
Lead DFT Engineer
Noida|DFT|senior
NXP Semiconductors
Principle DFT Engineer
2 Locations|DFT
Intel
CPU DFT Manager
India, Bangalore|DFT|manager
Micron Technology
MGR, Tainan Photo Scanner Equipment
Tainan, Taiwan|DFT|manager
NXP Semiconductors
Senior DfT Engineer
Chandler (Office)|DFT|senior
NVIDIA
Senior ASIC Design Engineer - DFT
US, CA, Santa Clara|DFT|senior
NXP Semiconductors
Lead DFT Engineer
Noida|DFT|lead
NXP Semiconductors
Sr. DFT Engineer
Noida|DFT|senior
Broadcom
DFT Engineer
China-Shanghai-Zhangjiang Hi Tech|DFT
Micron Technology
MGR, Tainan Photo Scanner Process
Tainan, Taiwan|DFT|manager
NVIDIA
Senior DFT Power Methodology Engineer
US, CA, Santa Clara|DFT|senior
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT|senior
NVIDIA
Senior DFT Methodology Engineer
US, CA, Santa Clara|DFT|senior
KLA Corporation
Applications Development Engineer - SurfScan
Singapore, Singapore|DFT|entry
Intel
DFT Implementation Engineer
US, Texas, Austin|DFT|mid
KLA Corporation
Product Install Engineer -Surfscan Extensive 90% + Travel Required
2 Locations|DFT|entry
KLA Corporation
Applications Development Engineer - Surfscan
Milpitas, CA|DFT
Micron Technology
High NA EUV - Scanner Engineer
Albany, NY|DFT|mid
Broadcom
DFT Engineer
ISR-Tel Aviv University|DFT|senior
Analog Devices
Senior Engineer, DFT Engineering
India, Bangalore, RMZ|DFT|senior
Analog Devices
Senior DFT Engineer
India, Bangalore, RMZ|DFT|senior
NVIDIA
Senior DFT Methodology - Data Analytics and Applied AI Engineer
US, CA, Santa Clara|DFT|senior
Micron Technology
Senior Engineer - HBM Design for Test (DFT)
Richardson, TX|DFT|senior
Intel
Senior ASIC DFT Engineer
Israel, Haifa|DFT|senior
Broadcom
DFT Lead Engineer
USA-CA San Jose Innovation Drive|DFT|principal
NVIDIA
Manager, DFT - Post Silicon
2 Locations|DFT|manager
NVIDIA
Senior DFT Engineer
US, CA, Santa Clara|DFT|senior
NVIDIA
NVIDIA 2027 Internships: Hardware Design for Test (DFT)
US, CA, Santa Clara|DFT|intern
Micron Technology
New College Grad - Engineer - HBM Design for Test (DFT)
Richardson, TX|DFT|entry
Broadcom
DFT Engineer
USA-CA San Jose Innovation Drive|DFT|senior
Intel
DFT Design Engineer
India, Bangalore|DFT
NVIDIA
Senior DFT Engineer
2 Locations|DFT|senior
Marvell Technology
Design for Test Intern, BS - Summer 2027
4 Locations|DFT|intern
GlobalFoundries
Sr Staff DFT Engineer
IND - Karnataka - Bengaluru - North|DFT
Micron Technology
PHOTO SCANNER Process Engineer
Miaoli - Tongluo, Taiwan|DFT
Micron Technology
MGR, F16N PHOTO SCANNER PEE1
Miaoli - Tongluo, Taiwan|DFT
Micron Technology
MGR, F16N PHOTO SCANNER PEE2
Miaoli - Tongluo, Taiwan|DFT
Broadcom
ASIC DFT Engineer
2 Locations|DFT|senior
Broadcom
DFT Manager
IND-Bangalore Electronic City - S1|DFT|manager
NXP Semiconductors
Senior principal DFT engineer
Bangalore|DFT|principal
NXP Semiconductors
DFT Engineer
Tianjin (Teda)|DFT|mid
Marvell Technology
Design For Test Intern, MS - Summer 2027
Santa Clara, CA|DFT|intern
Analog Devices
Staff Engineer – DFT Engineering
3 Locations|DFT|staff
Intel
NMSi F11X Litho Scanner Senior Engineer
US, New Mexico, Albuquerque|DFT|senior
NXP Semiconductors
Junior DfT Design Engineer - MCU
Catania|DFT|entry
NXP Semiconductors
Stage Ingénieur : Conception Numérique SoC - Design for Test (F/H)
Caen|DFT|intern
NXP Semiconductors
Stage Ingénieur : Conception pour le test (DFT) / Conception numérique (F/H)
Sophia-Antipolis (Valbonne)|DFT|intern
Micron Technology
SR. Process Engineer, PHOTO SCANNER (Tongluo, Miaoli)
Miaoli - Tongluo, Taiwan|DFT|senior
NVIDIA
Senior DFT Methodology Engineer
US, CA, Santa Clara|DFT|senior
NVIDIA
Senior DFT Methodology Engineer
US, CA, Santa Clara|DFT|senior
NVIDIA
Senior DFT Engineer - Post Silicon
2 Locations|DFT|senior
NVIDIA
DFT Engineer (RDSS Intern) - 2027
2 Locations|DFT|intern
Marvell Technology
Principle DFT Engineer
Bangalore|DFT|principal
Micron Technology
MTS SoC DFT Engineer, HBM
2 Locations|DFT|staff
Intel
Product Failure Analysis Engineer - SCAN Design for Test
US, Oregon, Hillsboro|DFT
Broadcom
Senior DFT engineer
Singapore-Yishun|DFT
NVIDIA
Software Engineer – DFT CAD Tools (RDSS Intern)
Taiwan, Taipei|DFT
NVIDIA
Tools and Methodology Engineer, CAD DFT (RDSS Intern)
2 Locations|DFT
NXP Semiconductors
Senior SOC Design For Test Engineer
2 Locations|DFT
Micron Technology
HBM Media Health Product Engineer (DFT)
Boise, ID - Main Site|DFT
Micron Technology
HBM Media Health Product Engineer (DFT)
Boise, ID - Main Site|DFT