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About This Role
- About the Role Join Intel’s CPU Design Team within the Silicon & Platform Engineering (SPE) Group, where you will help architect and deliver next-generation, power-efficient, high-performance processors .
- As a Senior CPU RTL Design Engineer – Power Management , you will play a critical role in designing and delivering CPU microarchitectures with strong emphasis on power management and energy-efficient design.
- This role is ideal for engineers who can contribute with minimal ramp-up and bring deep expertise in low-power CPU/SoC design.
- You will partner closely with architecture, verification, and physical design teams to deliver industry-leading silicon.
- What You’ll Do Define, design, and implement CPU microarchitecture features Develop and deliver RTL (SystemVerilog/Verilog) for CPU IP blocks Drive power, performance, and area (PPA) optimization, with a strong focus on: Power-aware RTL design Energy-efficient architectures Design and validate multi-clock domain and CDC solutions Contribute to CPU power management features, including: Dynamic voltage and frequency scaling (DVFS) Power/thermal management Reset flows and power state transitions (P/C states) Debug complex RTL and collaborate with verification teams Partner with SoC integration teams for full-chip delivery Contribute to design methodology improvements and scalability Behavioral Traits that we are looking for: Ownership & Accountability – operates independently with minimal guidance Depth over keywords – demonstrates hands-on expertise (not just tool exposure) Problem-solving rigor – able to debug and resolve complex design issues Collaboration mindset – works effectively across cross-functional teams Technical leadership – influences design decisions and drives best practices Bias for action & urgency – maintains strong execution pace in fast-moving environment Qualifications: You must possess the below minimum qualifications to be initially considered for this position.
- Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- Note: For information on Intel’s immigration sponsorship guidelines, please see Intel U.S.
- Immigration Sponsorship Information Minimum Qualifications and Experience : Bachelor's degree in Electrical/Computer Engineering, Computer Science or related filed with 9+ years of relevant experience.
- Or a Master's degree in the same field with 7+ years of experience.
- You experience mentioned above must be in the following: Experience with power management concepts (e.g., DVFS, power states, budgeting) Experience in low-power / power-aware CPU or SoC RTL design RTL development (Verilog/SystemVerilog) Debug and system-level design understanding Preferred Qualifications and Experience: Experience in multi-clock domain / CDC design Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
- Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays.
- Familiarity with circuit planning and timing convergence processes.
- Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
- Proficient with static timing analysis, UPF and lint checks.
Benefits
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Sourced directly from Intel’s career page
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/job/US-Texas-Austin/Senior-CPU-RTL-Design-Engineer---Power-Management_JR0285081
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