Opens intel.wd1.myworkdayjobs.com in a new tab
About This Role
- The CPU Circuit Technology team is looking for a highly motivated and experienced individual to join our team as a Memory Circuit Design Engineer.
- In this role, you will be responsible for designing, developing, and building full-custom as well as compiler-based SRAMs, Large Signal Arrays (custom multi-ported register file), ROMs, custom memories, digital circuits and Caches for Intel CPUs and SOCs.
- You will be partnering with and leveraging domain experts across various areas of technology development to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on advanced CMOS process technologies for Intel CPU and SOCs.
- This will be a fast-paced dynamic environment where you will work in the high performance, low power CPU design team on a wide spectrum of circuit activities including, but may not be limited to: • Technical readiness, memory circuit design, characterization and simulations. • Cache design, critical path simulations and design custom blocks. • Memory path-finding activities and power, performance and area (PPA) optimization. • Memory bit-cell and complex periphery IC design and automation. • Memory array/IP design, memory circuit innovation. • Methodology definition tasks as well as executing to project schedules.
Requirements
- to be initially considered for this position.
- Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Requirements
- Bachelor's degree with 8+ years of experience; or master's degree with 6+ years of experience; or PhD with 4+ years of experience in in Electrical Engineering, Computer Engineering, Computer Science or a STEM-related field 3+ years of experience in CMOS circuit design, digital logic optimizations, and circuit trade-offs for power, performance, and area. 3+ years of expertise in SRAM and Cache design.
Nice to Have
- Experience in low-power implementation techniques and memory design.
- Familiarity with circuit and layout trade-offs for optimized design.
- Knowledge of EBB design tools, flows and methodologies, and signal integrity analysis.
- Strong analytical and problem-solving skills, with the ability to prioritize tasks and work in dynamic environments.
- Help shape the future of technology and join a team that's driving innovation at the forefront of CPU design.
- Apply now to make a meaningful impact at Intel.
Benefits
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $190,610.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
Opens intel.wd1.myworkdayjobs.com in a new tab
Specialisation
Open roles at Intel
95 positions
Job ID
/job/US-Texas-Austin/Memory-Circuit-Design-Engineer_JR0284353
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar Other roles
Broadcom
Software Development Engineer in Test (SDET)
2 Locations|Other
Samsung Semiconductor
Staff Engineer, Compiler
San Jose, California, United States|Other
Samsung Semiconductor
Sr. Director Accounting
San Jose, California, United States|Other
Samsung Semiconductor
Senior Manager, Memory Sales
San Jose, California, United States|Other