Hardware & Silicon Validation Senior Staff Engineer

What You'll Do

• Architect and design high‑performance board‑level systems for compute, networking, and storage applications, driving from concept through production. • Define, review, and approve schematics and PCB layouts, with strong emphasis on signal integrity, power integrity, and high‑speed design best practices. • Lead the selection, implementation, and optimization of high‑speed interfaces, including PCIe Gen6, DDR4 / DDR5, 10G / 25G / 100G / 200G Ethernet • Perform and interpret signal integrity (SI) and power integrity (PI) simulations and analyses using industry‑standard tools such as HyperLynx, Sigrity, ADS, or equivalent platforms. • Collaborate closely with silicon, firmware, mechanical, thermal, validation, and manufacturing teams to ensure system‑level design optimization and seamless integration. • Drive design and architecture reviews, providing technical leadership and mentorship throughout the entire product development lifecycle. • Partner with manufacturing and test teams to ensure designs meet DFM/DFT requirements and enable efficient, reliable board bring‑up and production ramp. • Engage directly with customers to develop and support reference designs, incorporating feedback to influence architecture and design decisions. • Identify and proactively mitigate technical risks, ensuring performance, reliability, and schedule targets are met.
• What We're Looking For • Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 5–10 years of relevant industry experience; or Master’s degree and/or PhD in Computer Science, Electrical Engineering, or a related discipline with 3–5 years of professional experience. • Strong understanding of PCB design fundamentals, including schematic capture, component placement, routing, stack‑up definition, and design for manufacturability (DFM) and testability (DFT). • Experience with industry‑standard EDA tools for board design (e.g., Cadence Allegro/OrCAD, Altium Designer, Mentor Xpedition, or equivalent). • Solid knowledge of high‑speed digital design concepts, including controlled‑impedance routing, signal integrity, timing constraints, and differential pair routing. • Ability to interpret datasheets, reference designs, and electrical specifications to implement robust and compliant board designs. • Hands‑on experience supporting board bring‑up and debug, working closely with validation, silicon, and system teams. • Familiarity with power integrity, PDN design, decoupling strategies, and low‑noise analog layout techniques is desirable • Experience designing boards incorporating high‑speed interfaces such as PCIe, USB, Ethernet, DDR memory, or SerDes technologies is desirable. • Exposure to board‑level simulation or analysis tools for signal integrity (SI), power integrity (PI), or thermal analysis is desirable. • Strong problem‑solving and analytical skills, with attention to detail in complex designs. • Effective written and verbal communication skills, with the ability to collaborate across cross‑functional and global teams. • Demonstrated ability to work independently and collaboratively in a fast‑paced, multitasking engineering environment.
• Expected Base Pay Range (USD) 127,630 - 191,200, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
• The expected base pay range for this role may be modified based on market conditions.
• Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
• Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
• Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
• We look forward to sharing more with you during the interview process.
• Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
• Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• These tools must not be used to record, assist with, or enhance responses in any way.
• Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
• Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
• This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
• As such, applicants must be eligible to access export-controlled information as defined under applicable law.
• Marvell may be required to obtain export licensing approval from the U.S.
• Department of Commerce and/or the U.S.
• Department of State.
• Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-SA1