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Nice to Have

  • Deep experience with high-speed IO and die-to-die interface characterization, including PCIe, Serdes, UCIe, HBM, CXL, and proprietary interconnect technologies.
  • Hands-on experience developing ATE solutions for advanced packaging technologies, including: Multi-Chip Module (MCM) Co-Packaged Copper (CPC) Co-Packaged Optics (CPO) 2.5D/3D heterogeneous integration Strong background in wafer probe hardware, high-speed load board design, socket design, signal integrity, power integrity, and thermal optimization for high-current AI devices.
  • Experience with high-speed digital test methodologies, including frequency-domain and time-domain measurements up to 100GHz and beyond.
  • Knowledge of chip-to-chip communication protocols and embedded device management interfaces such as I2C, SPI, JTAG, MDIO, eFuse, ADC/DAC calibration, and telemetry systems.
  • Hands-on expertise with automated test platforms including Advantest 93K and Teradyne UltraFLEX.
  • Strong software development skills with production deployment experience in Python, C/C++, and Java.
  • Experience architecting scalable test executive frameworks, reusable software libraries, and revision-controlled ATE infrastructure for global manufacturing deployment.
  • Proven track record building, mentoring, and leading high-performing engineering organizations focused on innovation, execution, and operational excellence.
  • Expected Base Pay Range (USD) 169,900 - 254,500, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
  • The expected base pay range for this role may be modified based on market conditions.
  • Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
  • Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
  • Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
  • We look forward to sharing more with you during the interview process.
  • Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com .
  • Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
  • These tools must not be used to record, assist with, or enhance responses in any way.
  • Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
  • Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
  • This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
  • As such, applicants must be eligible to access export-controlled information as defined under applicable law.
  • Marvell may be required to obtain export licensing approval from the U.S.
  • Department of Commerce and/or the U.S.
  • Department of State.
  • Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TT1

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Marvell Technology

Santa Clara, CA

Specialisation
Open roles at Marvell Technology
711 positions
Job ID
/job/Santa-Clara-CA/Test-Engineering-Director_2602211

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