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What You'll Do
- but are not limited to. • Improve the design methodology and flow. • Synthesis, timing closure, and DFT support for various types of SerDes IPs ranging from 10Gbps to 224Gbps data rates for different applications. • Collaborate with Analog/Digital design teams to deliver competitive SerDes IP solutions for all the Marvell product lines. • Provide support to the product teams, for both pre and post-silicon What We're Looking For Master’s degree and/or PhD in EE, CS or related fields and 6+ years of experience.
- Good personal communication skills and team working spirit.
- Hardworking and motivated to be part of a highly competent design team.
- Must have good post-RTL experience including synthesis, timing analysis and physical design.
- Able to perform custom placement and routing for mixed-signal designs.
- Flexible to move between all post-RTL design activities as required.
- Good understanding of block and top-level physical timing closure.
- Must be proficient in the following skills: • Logic or physical synthesis using Synopsys or Cadence tools • DFT generation and verification • Static timing analysis using Primetime • Physical design for 28nm and beyond • Strong Perl and Tcl scripting skill Highly desirable skills: • Low power design • Circuit level or custom design experience • Floorplanning, clock-tree synthesis and power planning/analysis • Signal integrity and physical verification Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity.
- We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.
- For additional information on what it’s like to work at Marvell, visit our Careers page.
- Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
- These tools must not be used to record, assist with, or enhance responses in any way.
- Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
- Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
- This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
- As such, applicants must be eligible to access export-controlled information as defined under applicable law.
- Marvell may be required to obtain export licensing approval from the U.S.
- Department of Commerce and/or the U.S.
- Department of State.
- Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-SYU
Sourced directly from Marvell Technology’s career page
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Specialisation
Open roles at Marvell Technology
87 positions
Job ID
/job/TW---Hsinchu/Senior-Staff-Engineer--Digital-IC-Design_2601670
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