System Hardware (SIPI) Engineer, Principle

What You'll Do

• Define and lead SI/PI activities and analysis for PCBs, De-embedded structure, and system‑level interconnects.
• This includes working with PCB layout engineers and PCB fabs to understand design constraints/limitations and define layout guidelines for best performance.
• Participance with layout lead to review and approve final Gerber files for PCB fabrication.
• Develop and refine methodologies for modeling, simulation, and measurement correlation of signal and power integrity, minimize the gap between simulation and measurement.
• Drive innovation in I/O and channel architectures to enable higher speeds, densities, and lower IR drop and power noise.
• Collaborate across multiple teams (packaging, system, validation) to define test fixtures for silicon characterization, silicon debug, system robustness testing, etc.
• Mentor and coach engineers , providing technical guidance and fostering a culture of excellence.
• Perform path‑finding research in electromagnetic modeling, PDN optimization, and advanced packaging.
• Support customers with SI/PI expertise and ensure product performance meets application requirements What We're Looking For General Requirements: Bachelor’s/Master’s degree in Electrical engineering in Electrical Engineering or related field.
• Deep expertise in electromagnetic theory, transmission lines, RF concepts, and analog design principles.
• Strong background of high speed SerDes (Architecture, Functional Blocks, Link optimization) and standards (IEEE 802.3, OIF). 6+ years of industry experience in SI/PI, EMI, and high‑speed design.
• Proficiency with SI/PI simulation tools (HFSS, SIwave, ADS, HSPICE, Q3D, etc.).
• Be able to adjust/modify PCB layout for trial runs during design optimization prior releasing the guideline to layout engineers.
• Strong track record of technical leadership, innovation, and cross‑functional collaboration.
• Excellent communication skills for technical presentations and customer engagement.
• Experience of using Vector Network Analyzer (VNA), probe station, calibration and measurement.
• Additional Compensation and Benefit Elements Competitive salary, plus 13th-month salary and performance-based bonus RSUs (Restricted Stock Units) for new joiners and on-going annually Premium health & accident insurance for you and your family (spouse and children) Annual medical check-up at a designated hospital arranged by Marvell Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.
• Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
• These tools must not be used to record, assist with, or enhance responses in any way.
• Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time.
• Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
• This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR).
• As such, applicants must be eligible to access export-controlled information as defined under applicable law.
• Marvell may be required to obtain export licensing approval from the U.S.
• Department of Commerce and/or the U.S.
• Department of State.
• Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-UN1