Senior Digital Design & Verification Engineer

What You'll Do

• Lead and execute digital design activities from specification to RTL implementation, including micro-architecture definition, clock domain crossing (CDC) analysis, and linting.
• Develop and implement comprehensive verification plans, including testbench architecture, UVM-based verification environments, and assertion-based verification.
• Perform functional verification, formal verification, and gate-level simulations to ensure design correctness and robustness.
• Collaborate with system architects, analog designers, and software teams to define design requirements and resolve integration challenges.
• Debug complex design and verification issues, identify root causes, and propose effective solutions.
• Contribute to continuous improvement of design and verification methodologies, tools, and flows.
• Mentor junior engineers and provide technical guidance within the team.
• Generate detailed documentation for design, verification, and analysis.
• Job Qualifications Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum of 7 years of experience in digital IC design and verification.
• Proven expertise in RTL design (Verilog/SystemVerilog) and strong understanding of digital design principles.
• Extensive experience with UVM (Universal Verification Methodology) for testbench development and verification.
• Proficiency in industry-standard EDA tools for simulation, synthesis, linting, and formal verification.
• Solid understanding of embedded systems, microcontrollers, and communication protocols (e.g., SPI, I2C, UART, CAN, LIN).
• Experience with scripting languages (e.g., Python, Perl, Tcl) for automation and data analysis.
• Strong analytical, problem-solving, and debugging skills.
• Excellent communication and interpersonal skills, with the ability to work effectively in a collaborative team environment.
• Fluency in English (written and spoken) is required.
• More information about NXP in France... #LI-7795