Senior Design Verification Engineer

Qualifications

• Minimum BSEE/BSCE/BSCS.
• MSEE/MSCE/MSCS a plus.
• Minimum 4 years of experience in IP or SoC design or verification.
• Hands on experience in using AI/ML tools for workflow and productivity improvements.
• Verilog, SystemVerilog, UVM coding skills required.
• Verification skills (test planning, testcase, testbench, simulation, debug) required.
• Other programming skills (Python, C/C++, Perl, TCL, etc.) a plus.
• Design skills (design documentation, RTL coding, synthesis, static and formal checkers, etc.) a plus.
• Knowledge of ARM AMBA® protocols a plus.
• Ability to work independently and in small teams without close supervision required.
• Job location: Austin, TX More information about NXP in the United States...
• NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law.
• In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-6692