Senior Principal Software Engineer - Accelerated Verification IP

What You'll Do

• Designing and implementing protocol functionality in PCIe AVIP and/or Virtual Bridge components Developing and debugging BFMs, transactors, and associated software interfaces Ensuring correctness, performance, and scalability in emulation and acceleration flows Collaborating with cross‑functional teams Participating in feature bring‑up, regression, and release activities Supporting customer issues, reproducing problems, and delivering fixes What you’ll need BS with a minimum of 10 years of experience OR MS with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience Strong fundamentals in digital design, computer architecture, and system‑level verification Experience with hardware description languages (SystemVerilog/Verilog) and/or C/C++ Understanding of standard interconnect or IO protocols (e.g., PCIe, CXL, NVMe) Familiarity with emulation, acceleration, or hybrid verification flows is a strong plus Good debugging skills using waveforms, logs, and protocol analyzers Ability to work across hardware and software boundaries The annual salary range for California is $154,000 to $286,000.
• You may also be eligible to receive incentive compensation: bonus, equity, and benefits.
• Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure.
• Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
• Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
• We’re doing work that matters.
• Help us solve what others can’t.