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Nice to Have
- Master’s degree in Computer Science/Engineering, Electrical Engineering, or a related field.
- Prior experience with IC digital implementation flows and front-end EDA tools, including Synthesis, DFT, and Logical Equivalence Checking.
- Experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus, or with similar tools like ICC, ICC2, DC, or Primetime is highly desired.
- Experience with advanced nodes at 5nm and below.
- Domain expertise in CPUs, GPUs, AI Engines, Networks on Chip (NoCs), or high-speed interfaces.
- Experience with 3D IC design is a significant plus.
- We’re doing work that matters.
- Help us solve what others can’t.
Sourced directly from Cadence Design Systems’s career page
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Specialisation
Salary range
₹5-11 LPA to ₹38-65 LPA
Open roles at Cadence Design Systems
26 positions
Job ID
/job/AUSTIN-03/Chip-Lead---Physical-Design-Director_R54647
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