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What You'll Do
- Lead end-to-end DFT implementation for SoC subsystems Drive DFT RTL integration and verification activities Manage cross-functional coordination for DFT deliverables at block/subsystem level Implement full-scan DFT methodologies Develop and optimize scan insertion and compression techniques Execute ATPG flows to achieve required fault coverage Define and implement MBIST architectures, including repair flows Support LBIST planning and implementation Implement and ensure compliance with Boundary Scan / JTAG requirements Apply low-power DFT methodologies Perform testability analysis and improve design coverage Support silicon debug and failure analysis More information about NXP in India... #LI-7013
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Specialisation
Salary range
₹5-10 LPA to ₹35-58 LPA
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773 positions
Job ID
/job/Noida/Lead-DFT-Engineer_R-10063965
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