2026 Campus - SoC DFT Engineer

Overview

• NXP team members create breakthrough technologies that make the connected world better, safer and more secure.
• We're looking for innovative, passionate, and talented people like you to join our team.
• Responsibility: • Proficiency in whole DFT architecture definition.
• Setup and maintain DFT flow, familiar with script language.
• Be responsible for definition and implementation different schemes of DFT aspects: including scan/MBIST/JTAG insertion, ATPG generation, test patterns generation.
• Experience RTL/netlist simulation, good debug capability, familiar with Verilog.
• Experience with ATE on-line debugging and DFT diagnosis.
• Experience with Post-silicon DPPM improvement, coverage hole analysis.
• Requirement: • Bachelor or master’s degree in Microelectronics, Electronics, Electrical Engineering, Computer Science or relevant disciplines.
• Good knowledge and experience in DFT implementation methodology, flow optimization and DFT coverage improvement.
• Mentor tool is a plus.
• Strong skills of solving problem, self-motivated and good team player.
• More information about NXP in Greater China..