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What You'll Do

  • Be responsible for the layout and integration of critical analog blocks , ensuring low‑noise performance, high reliability, and robust operation across PVT corners for advanced process technologies. 6+ years of hands‑on experience in custom analog / mixed‑signal layout Apply strong device physics expertise to drive high‑quality layout implementation, including transistor matching strategies, well and substrate engineering, parasitic optimization, and EM/ESD reliability considerations.
  • Implement and review high‑speed layout techniques for sensitive analog and mixed‑signal paths, focusing on impedance control, skew matching, shielding, isolation, and crosstalk mitigation.
  • Work closely with circuit designers and architects to enable layout‑aware design , proactively identifying and resolving parasitic, noise, and performance risks early in the design cycle.
  • Lead post‑layout optimization and sign‑off activities , including DRC/LVS, EM/IR analysis, and correlation of post‑layout simulations with silicon or lab data.
  • Provide technical mentorship and build reviews for complex blocks, contributing to guidelines, quality improvement, and first-silicon success.
  • Leverage AI/ML knowledge as a value to support data‑driven optimization, layout automation initiatives, and improved debug and correlation workflows.
  • Education B.Tech in Electronics, Electronics & Communication, or VLSI Engineering M.Tech in VLSI Design, Microelectronics, or Electronics Engineering About Micron Technology, Inc.
  • We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all .
  • With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands.
  • Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
  • To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
  • Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
  • AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials.
  • However, all information provided must be accurate and reflect the candidate's true skills and experiences.
  • Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
  • Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

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Micron Technology

Hyderabad - Phoenix Aquila, India

Specialisation
Open roles at Micron Technology
2747 positions
Job ID
/job/Hyderabad---Phoenix-Aquila-India/Senior-Layout-Engineer-DPG-LPDDR_JR95563

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