SOC Emulation Validation Engineer

About This Role

• Come join us to work on Intel's next generation Client CPU SoC with latest process technology in the era of hyper scale computing.
• This position involves validation of the next generation of Intel Client SoC Full chip, with a unique opportunity to work on next generation process nodes .
• Responsible to define next generation validation strategy ensuring they meet product specification and functionality before they are productized into physical chip, drive innovation and changes required in validation to incorporate ML/AI based strategic initiatives to improve quality and efficiency.
• Successful applicants will be required to work very closely with design teams and architects to implement the low-level Register Transfer Logic (RTL) design to ensure overall good functionality of the chip.
• Develop specific test environment/platform, validation strategy, methodology and test plan to validate System on Chip SOC design by identifying and exercising boundary conditions and special cases in an effort to break the chip to find that last elusive bug.
• As an SOC Fullchip and Emulation Engineer, you will be responsible but not limited to: Creating emulation models from a Register Transfer Level (RTL) design.
• Defining and documents RTL changes required for emulation model.
• Developing hardware and software collaterals and integrates it with the emulation model.
• Testing and debugging the emulation model and collateral.
• Defining and developing new capabilities and HW/SW tools to enable acceleration of RTL and improve emulation model usability for pre-silicon functional validation.
• Developing improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.
• Interfacing with and provides guidance to IU/SoC validation teams for optimizing their validation environments, test suites and methodologies for emulation efficiency.
• Developing and applying automation aids, flows and scripts in support of emulation ease to use and improvement of equipment utilization.