Opens intel.wd1.myworkdayjobs.com in a new tab
About This Role
- As a Silicon Photonics (SiP) PDK Design Engineer, you will be part of Intel's SiP Process Development and Manufacturing (SPDM) team that is leading Intel's market transition and driving innovation for the next generation of optical interconnect products.
- You will play a critical role in enabling growth of Intel's SiP foundry business by developing and owning PDK infrastructure.
- Primary Responsibilities: Creates, modifies, and documents pcell design and related user guides.
- Creates, modifies, and documents design rule and other physical verification runsets.
- Installation and automation of EDA tool flows.
- Architects, designs, leads pathfinding, development, validation of software solutions in support of tools, flows, PDK design components, and methodologies used in Electronic-Photonic design automation, software products, or ecosystem enabling.
- Engages with internal/external partners on technical requirements and with technologists across Intel, and within the industry, to evaluate feasibility and priorities.
- Designs, develops, tests, and debugs software tools, flows, PDK design components, and methodologies used in Electronic-Photonic design automation and by teams in the design of hardware products, process design, or manufacturing.
- Captures user stories/requirements, writing both functional and test code, automating build and deployment.
- Performs unit, integration, and end-to-end testing.
- Ensures efficient planning, provisioning, configuration, and maintenance of cloud computing infrastructure including interactive and batch computing, ticketing, storage, and licensing.
- Lead developer of Design Environment and CI/CD pipelines used to build, validate, and release Electronics-Photonics Design Automation hardware and software products.
- The successful candidate must demonstrate the following: Excellent people skills with the capability to influence stakeholders and lead cross functional team of Layout engineers, designers, design automation and fab process integrators.
Requirements
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, Applied Physics, Optical Physics, Optical Communications, Optical Science or related field. 2+ years of experience in Electronic Design Automation Software Development focused on Physical Verification, Layout verification, and/or run set development 2+ years of combined experience in the following: Development of foundry rule deck (DRC and LVS) runsets.
- Expertise in industry standard integrated circuits (IC) design CAD tools/flows such as Siemens Calibre, Cadence Virtuoso.
- Software development/programming in high-level languages (e.g.
- Perl/Python/ Shell/TCL/C++).
- Scripting and SKILL coding, Calibre SVRF/TVF and Synopsys ICValidator.
- Analog IC or Photonic Integrated Circuit (PIC) design concepts and flows.
Nice to Have
- MS or Ph.D. with 3+ years of experience in Electronic Design Automation Software Development focused on Physical Verification, Layout verification, and runset development.
- Developing Smart Fill decks, DRC/LVS runset development, parasitic extraction and support in EDA tools and flows such as Synopsys ICV, Siemens/Mentor Calibre, Cadence PVS/Pegasus.
- Familiarity with Virtuoso Photonic Solutions, including hands-on experience scripting in SKILL and using Virtuoso CurvyCore concepts and implementation.
- Experience with Synopsys OptoCompiler including the skills to design and implement photonic components and circuits using these tools.
- Proficiency in coding and scripting for Synopsys IC Validator (ICV) to perform design rule checks (DRC) and layout versus schematic (LVS) verification.
- Versatile in Design Tools, flows and Methods, broad expertise with Pcells, Schematic Driven Layout (SDL), Floor planning, Infrastructure and Environment set up and version control.
- Experience in VLSI circuit, CMOS layout design and validation.
- Experience with multiple foundry technologies.
- Experience using Unix or Linux operating system.
- Test case generation automatic and manual, QA and validation.
- Expert technical problem solver with hands on execution experience with TI, TO process for complex hierarchical designs.
- Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Benefits
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
Opens intel.wd1.myworkdayjobs.com in a new tab
Specialisation
Open roles at Intel
95 positions
Job ID
/job/US-New-Mexico-Albuquerque/Silicon-Photonics-Foundry-PDK-Design-Engineer_JR0282756-1
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar Other roles
Broadcom
Software Development Engineer in Test (SDET)
2 Locations|Other
Samsung Semiconductor
Staff Engineer, Compiler
San Jose, California, United States|Other
Samsung Semiconductor
Sr. Director Accounting
San Jose, California, United States|Other
Samsung Semiconductor
Senior Manager, Memory Sales
San Jose, California, United States|Other