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About This Role
- The Role and Impact: As a Mixed Signal Design Verification Engineer, you will be instrumental in ensuring Intel's success in delivering innovative and high-quality mixed signal components.
- By leveraging your technical expertise in verification methodologies, you will validate and enhance the functionality of mixed signal IPs (example PCIE, UCIE, USB4/Type-C PHYs).
- Your work will directly contribute to Intel's leadership in cutting-edge technology, ensuring the performance, reliability, and efficiency of our products.
- This role offers a unique opportunity to collaborate with cross-functional teams and contribute to the development of industry-leading solutions.
- Key Responsibilities: Perform functional verification of mixed signal logic components, including analog behavioral modeling, to ensure compliance with design specifications.
- Develop comprehensive IP verification plans, test benches, and environments to achieve thorough coverage of mixed signal microarchitecture specifications.
- Define and execute simulation models to verify design performance, analyze power and timing, and identify and resolve design bugs.
- Conduct root cause analysis and implement corrective measures to address failing tests in the pre silicon environment.
- Collaborate with digital and analog architects, RTL developers, and physical design teams to refine and optimize architectural and microarchitectural features.
- Lead technical reviews of test plans and validation proofs with design and architecture teams, ensuring meticulous documentation of findings and processes.
- Maintain and enhance functional verification methodologies, infrastructure, and tools to align with evolving industry standards and best practices.
Requirements
- Bachelor's or Master's degree in electronics and communication or electrical engineering, VLSI Engineering, or a related field. 4+ years of experience with a Bachelor's degree, or 3+ years of experience with a Master's degree in ASIC or IP verification, subsystem and function coverage.
- Proficiency in mixed signal verification and hands on in IP verification using SystemVerilog, UVM, and Verilog.
- Hands-on experience with industry-standard EDA tools, such as Synopsys VCS, Cadence Xcelium, or Mentor Questa, for simulation and verification.
- Strong scripting skills in Python, Perl, or Tcl for automation and efficiency in testbench development.
- Familiarity with standard protocols including JTAG, IJTAG, CRI, and APB, as well as multi-clock domain mixed signal designs.
- Expertise in constraint-random test generation, root cause analysis, and debugging of complex mixed signal designs.
Nice to Have
- Experience with low-power design techniques, including UPF and clock gating, to optimize power consumption.
- Knowledge of Formal Property Verification tools and version control systems such as Git or Perforce.
- Strong collaboration and communication skills with the ability to thrive in a dynamic, multi-disciplinary team environment.
- Join us to drive verification excellence at Intel and shape the future of technology.
- Apply today and be part of our journey to deliver transformative innovations.
Sourced directly from Intel’s career page
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Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
95 positions
Job ID
/job/India-Bangalore/Mixed-Signal-Design-Verification-Engineer_JR0284338-1
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