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About This Role
- The Advanced Packaging Technology Development Substrate and Wafer Assembly (APTD: S and WA) team develops and delivers advanced substrate packaging and wafer assembly solutions for customers.
- As part of the Substrate Integration Group, within APTD, you will play a pivotal role in shaping the future of advanced packaging.
- In this role, you will: Work at the forefront of packaging technologies essential for next-generation AI devices; Collaborate with substrate suppliers worldwide to drive innovation and scalability; Contribute to the deployment of EMIB-T, our next-generation advanced packaging substrate technology, enabling heterogeneous chip architectures; Lead efforts to qualify new capacity at advanced packaging suppliers, ensuring timely readiness to meet growing customer demand.
- We are seeking highly motivated professionals with strong technical expertise who thrive on solving complex challenges, challenge conventional approaches, and build lasting supplier partnerships.
- Note: This role requires regular onsite presence to fulfill essential job responsibilities.
- Key Responsibilities: Collaborate closely with on-site supplier engineering teams and the US integration team to advance substrate building block technologies and manage critical process interactions.
- Monitor, optimize, and improve capacity in bottleneck processes by implementing strategies that reduce throughput time (TPT).
- Oversee schedules for product and test vehicle (TV) deliveries, proactively resolving issues to achieve aggressive on-time delivery (OTD) targets.
- Conduct thorough analysis of substrate lead times, develop reduction roadmaps, and consistently meet quarterly lead time goals.
- Ensure strict adherence to Process Control System (PCS) commitments by suppliers.
- Partner with internal teams to design and execute new factory TV/product certification plans focused on yield improvement.
- Develop and maintain detailed micro-schedules for new factory startups, including milestone tracking to ensure supplier compliance with startup timelines.
- Lead qualification activities and monitor ramp indicators to guarantee smooth, incident-free production ramp-up of new capacity.
- Influence strategic decision-making at supplier management levels.
- Work Environment: Regular travel to supplier sites and onsite presence at factories (minimum three days per week).
- Collaboration with diverse teams across Asia and the US.
- Flexibility to adapt to evolving project scopes and dynamic business needs.
Requirements
- are required to be initially considered for this position.
- Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Requirements
- Bachelor's or Master's degree with 8+ years, or PhD with 4+ years work experience, in Science or Engineering. 6+ years of experience in fab back-end or substrate manufacturing process development.
Nice to Have
- Experience in capacity management, lead time analysis, structured problem solving, situational leadership, supplier influence, and stakeholder management.
- Strong understanding of substrate process building blocks such as component embedding, laser drilling, dielectric lamination, lithography, multi-metal electrolytic plating, defect inspection/metrology, and electrical testing.
- Experience qualifying /owning process tools in a TD/ramp or HVM context is desired.
- Hands-on experience in factory operations, substrates, manufacturing, process engineering, and yield improvement is highly preferred.
- Fluent business-level English communication skills, excellent presentation abilities, and capability to engage effectively with supplier management.
Sourced directly from Intel’s career page
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Specialisation
Open roles at Intel
712 positions
Job ID
/job/Taiwan-Taipei/Senior-Substrate-Program-Managers_JR0281426
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