Platform Signal/Power Integrity Engineer Lead

About This Role

• Job summary The Platform Signal/Power Integrity (SI/PI) Engineer Lead is responsible for defining, developing, and delivering Signal Integrity and Power Integrity solutions for Intel next-generation validation and product platforms.
• The role provides technical leadership in platform electrical architecture, high-speed interface implementation, schematic design, PCB layout review, routing guideline development, simulation, validation, and debugging activities.
• The successful candidate will collaborate closely with silicon, package, platform design, PCB layout, firmware, validation, and manufacturing teams to ensure high-performance, robust, and reliable platform designs that meet electrical, timing, signal quality, and power delivery requirements.
• Key Responsibilities: • Lead Signal Integrity and Power Integrity activities for complex platform, board, and package designs. • Perform pre-layout and post-layout SI/PI simulations and analysis. • Analyze and optimize: Channel loss Reflection Crosstalk Jitter Timing margin Power delivery network (PDN) performance Power noise and voltage droop • Develop electrical budgets and design margin requirements for high-speed interfaces. • Correlate simulation results with laboratory measurements and validation data. • Drive platform electrical architecture and implementation reviews. • Perform schematic capture and detailed schematic reviews for complex validation and production platforms. • Review power architecture, voltage regulator implementation, termination schemes, and interface connectivity. • Define stack-up, impedance, return path, and power distribution requirements. • Ensure compliance with platform electrical specifications and design targets. • Develop and maintain PCB design guidelines and routing constraints. • Define routing requirements for high-speed interfaces including: DDR4/DDR5 PCIe Gen4/Gen5/Gen6 USB4/Thunderbolt Ethernet CXL High-speed SerDes links • Conduct PCB layout reviews and provide sign-off recommendations. • Drive implementation reviews for: Length matching Differential pair routing Reference plane transitions Via optimization Return path continuity Decoupling placement EMI-sensitive routing practices • Work closely with PCB layout engineers and board vendors to resolve implementation issues. • Generate and maintain platform SI/PI design guidelines. • Develop interface-specific routing recommendations and implementation specifications. • Document design rules, characterization reports, simulation methodologies, and lessons learned. • Create customer-facing and internal SI/PI collateral supporting platform development and deployment. • Develop validation methodologies and compliance testing plans. • Perform electrical characterization and measurements using: Oscilloscopes Vector Network Analyzers (VNA) TDR/TDT equipment Logic analyzers Protocol analyzers • Debug signal integrity, timing, and power delivery failures. • Lead root-cause analysis and corrective action activities during board bring-up and validation. • Lead SI/PI reviews across multiple platform programs. • Mentor engineers in SI/PI methodology, PCB design practices, and debugging techniques. • Drive best practices and continuous improvement initiatives. • Provide technical leadership across platform, silicon, package, and validation organizations.