Package Design Rule Owner (DRO)

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The Role and Impact: Intel Foundry Technology Development is seeking an experienced Package Design Rule Owner (DRO) to join our Advanced Design and Customer Enabling (ADCE) Package team to support a broad range of product families.
Key Responsibilities: In this role, your responsibilities will include but not be limited to: The Package Substrate Design Rule Owner (DRO) is responsible for definition, validation and deployment of design rules for package substrate design.
The DRO collaborates with product design, substrate manufacturing and package assembly to identify and drive design rules that enable competitive product designs that meet cost and manufacturability requirements.
A key part of this role is being involved from the earliest stages of technology and product concept through to product design tape out.
The DRO works across product families to drive a consistent Design Rule strategy and a forward-looking, industry-leading Design Rule roadmap.
This position involves working with cross-disciplinary and cross-organizational stakeholders and interfacing directly with product designers.
Interaction with external suppliers and customers can also be expected in this role.

to be initially considered for this position.
Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

US Citizenship is required.
Ability to obtain and maintain a US Government TS/SCI Security Clearance with Polygraph.
Bachelor's degree in Electrical Engineering, Chemical Engineering, Mechanical Engineering, Physics, Material Science, or a related STEM field. 6+ years of experience with a Bachelor's degree, 4+ years with a Master's degree, or 2+ years with a PhD. 2+ years in semiconductor fabrication processes and packaging technologies. 2+ years of experience in package substrate physical design, or thermo-mechanical and electrical performance, or substrate manufacturing and assembly process or a combination of these areas.

Active US Government TS/SCI Security Clearance with Polygraph.
Expertise in advanced packaging architectures such as EMIB and Foveros. 5+ years of strong analytical and problem-solving skills: identifying, isolating, and debugging issues and providing creative solutions.
Ability to work independently and at various levels of abstraction 5+ years of strong organization, time management, and communication skills and self-motivated individual.
Good understanding of IC Packaging Strong Communication skills and the ability to work with others Take the next step in your career and contribute to Intel's mission of delivering innovative semiconductor solutions that push the boundaries of technology.
Apply today to be part of a dynamic team shaping the industry's future.

We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
Find out more about the benefits of working at Intel .
Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

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