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About This Role
- This position is in the Logic Technology Development (LTD) team, working in one of the most advanced semiconductor development facilities in the world.
- The LTD Resolution Enhancement Technology (RET) team is extending the limits of feature sizes that are patternable on Intel's devices, using current and future lithography manufacturing tooling.
- The team works closely with fab integrated lithography process and mask manufacturing teams using computational lithography tooling to optimize mask patterns and maximize manufacturing process capability.
- The RET team also works closely with the design rule definition teams, using lithography and patterning simulation capabilities to determine design rules for future Intel process nodes.
- What We Offer: We foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results.
- We give you opportunities to transform technology and create a better future, by delivering products that make the world a better place.
Requirements
- are required to be initially considered for this position.
- Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
- Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Requirements
- Bachelor's degree in a relevant field (e.g., Computer Science, Software Engineering, Electrical Engineering) with 6+ years of professional experience in the semiconductor industry OR Master's degree in a relevant field (e.g., Computer Science, Software Engineering, Electrical Engineering) with 4+ years of professional experience in the semiconductor industry OR Ph.D. in a relevant field (e.g., Computer Science, Software Engineering, Electrical Engineering) with 2+ years of professional experience in the semiconductor industry Hands-on professional experience includes one or more of the following: Pattern synthesis and mask layout manipulation Knowledge of OPC concepts and capabilities Preferred Qualifications: Understanding of the latest techniques for developing and optimizing OPC rule-based synthesis solutions to support both high volume and newly developing technology nodes For information on Intel’s immigration sponsorship guidelines, please see Intel U.S.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
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Specialisation
Open roles at Intel
806 positions
Job ID
/job/US-Oregon-Hillsboro/LTD-RET-Software-Research-Engineer_JR0287822
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