Intel
Lead SoC Logic Design Engineer
India, BangaloreRTL DesignHigh demand
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Salary range — RTL Design in India
Fresher (0-2y)
₹5-12 LPA
Mid (3-5y)
₹12-24 LPA
Senior (6-10y)
₹24-45 LPA
Staff (10+y)
₹40-70 LPA
Typical skills for RTL Design
VerilogSystemVerilogVHDLLogic SynthesisCDCLow Power DesignMicroarchitecture
Common EDA tools
Synopsys Design CompilerCadence GenusSynopsys VCSXilinx Vivado
About RTL Design roles
Designs digital logic at register-transfer level using Verilog/SystemVerilog, creating synthesizable hardware descriptions for ASICs and SoCs
Market insight: RTL designers with sub-7nm tapeout experience command premium salaries. SystemVerilog proficiency is table stakes; low-power design (UPF/CPF) and CDC expertise are strong differentiators.
Full description on Intel’s career page.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
IN
Intel
India, Bangalore
Opens intel.wd1.myworkdayjobs.com in a new tab
Specialisation
RTL Design
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
49 positions
Job ID
/job/India-Bangalore/Lead-SoC-Logic-Design-Engineer_JR0280666
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