IP Logic Design Engineer

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About This Role

  • The Role and Impact: As an IP Logic Design Engineer, you will play a pivotal role in driving Intel's innovation by developing cutting-edge logic designs for high-performance IPs integrated into SoC products.
  • Your contributions will directly impact Intel's ability to deliver world-class products across Client, Graphics, and Data Center markets.
  • In this role, you will collaborate with cross-functional teams to define architectures, optimize logic, and ensure the seamless integration of IPs into the broader chip design.
  • This position offers a unique opportunity to shape the future of digital design while leveraging your technical expertise to deliver reliable, power-efficient, and high-quality IP solutions.
  • Key Responsibilities: - Own and deliver logic design and RTL implementation for IP development, ensuring sign-off verification for functionality, reliability, and synthesis checks. - Develop architecture and microarchitecture specifications for logic components, driving area, power, and performance optimizations. - Apply advanced strategies and tools for RTL coding, simulation, and debug, ensuring designs meet power-performance-area (PPA) goals and timing integrity. - Collaborate with verification teams to review and execute verification plans, resolve failing RTL tests, and implement corrective measures to ensure design feature correctness. - Support SoC integration efforts, ensuring high-quality IP handoffs and seamless integration into full-chip designs. - Drive post-silicon validation, debug, and high-volume manufacturing support for IPs. - Manage stakeholder relationships across logic verification, digital backend, and SoC teams, ensuring alignment on implementation and design objectives.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, with 6+ years of experience in logic design and RTL development. - Expertise in SystemVerilog and RTL coding, including advanced digital design techniques. - Demonstrated experience in clock domain crossing, debugging microarchitecture/simulation, and static timing analysis. - Proficiency in low-power design strategies, including clock gating and UPF methodologies. - Familiarity with tools and techniques such as LINT, CDC, RDC, timing/synthesis, and regression/code coverage. - Strong analytical skills and hands-on experience resolving pre-silicon and post-silicon design challenges.

Nice to Have

  • Master's degree in Electrical Engineering, Computer Engineering, or a related field, with 5+ years of relevant experience. - Knowledge of AMBA protocols (CHI, AXI, AHB, APB), PCIe, and CXL standards. - Background in architecture and microarchitecture development for IP subsystems. - Experience working with physical design teams to address timing and backend implementation issues. - Familiarity with mixed-signal designs, behavioral coding, and simulations. - Understanding of PPA trade-offs and innovative design solutions. - Excellent communication skills and a proven ability to collaborate across geographically distributed teams.
  • Join Intel's mission to create innovative technologies that enrich and empower our global community.
  • Apply today to be part of a team that drives digital evolution and shapes tomorrow's innovations.

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Intel

India, Bangalore

Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
680 positions
Job ID
/job/India-Bangalore/IP-Logic-Design-Engineer_JR0284635

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