Senior Digital Design Engineer

Qualifications

• Minimum BSEE/BSCE/BSCS Minimum 4 years of experience in IP or SoC design Knowledge of SoC architecture required Expert knowledge of Verilog required Experience with design quality checks, including Lint, clock domain crossing (CDC) analysis, static timing analysis (STA) Expert knowledge of ARM AMBA bus protocol standards desired Knowledge of functional safety, including ISO26262 a plus Knowledge of CPU or cache architecture a plus Knowledge of C coding a plus Knowledge of scripting, such as Perl or Python, a plus More information about NXP in the United States...
• NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law.
• In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-6692