Lead Software Engineer

What You'll Do

• This role involves the design, development, and delivery of Assertion-Based Verification IPs for industry-standard protocols, with ownership of technical execution and quality.
• Analyze protocol specifications and translate requirements into robust formal verification plans, design models, SystemVerilog Assertions, assumptions, and coverage.
• Own the end-to-end development and maintenance of Assertion-Based Verification IPs, including architecture, implementation, validation, regression, release readiness, and documentation.
• Develop synthesizable RTL and verification components using strong RTL design, synthesis, and SystemVerilog concepts.
• Apply formal verification methodologies to prove complex protocol and design properties, identify convergence challenges, and implement effective abstractions and constraints.
• Create verification plans, define measurable coverage goals, review results, and drive closure of functional and formal coverage gaps.
• Debug complex design and verification failures using EDA tools, perform root-cause analysis, and deliver high-quality, scalable solutions.
• Build and enhance automation, regression, and productivity flows using scripting languages such as Python and Tcl.
• Provide technical guidance through design and code reviews, mentor junior engineers, and contribute to verification methodology and process improvements.
• Collaborate with Application Engineering teams and geographically distributed teams to resolve technical issues and meet delivery commitments.
• Communicate technical risks, dependencies, progress, and recommendations clearly to stakeholders, and support customer-facing technical discussions when required. undefined Qualifications BE/BTech/ME/MS/MTech in Electrical/Electronics Experience and Technical Skills Required 5+ years of experience in RTL design/Verification in case of BE/BTECH or Masters Degree with 3+ years of experience.
• Verilog/SystemVerilog and SVARTL design or verificationFormal verification concepts and tools would be plus point.
• Verification planning and coveragePython/Tcl scriptingAt least one protocol such as AXI, CHI, PCIe, or CXLWorking knowledge of AI/ML concepts and experience using AI-assisted tools to improve verification, debugging, automation, or engineering productivity.
• Behavioral skills required Must possess strong written, verbal and presentation skills.Ability to establish a close working relationship with both customer peers and management.Explore what’s possible to get the job done, including creative use of unconventional solutions.Demonstrate strong ownership, sound technical judgment, and the ability to drive complex assignments independently from planning through delivery.undefined We’re doing work that matters.
• Help us solve what others can’t.