Opens cadence.wd1.myworkdayjobs.com in a new tab
Overview
- At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- Candidate is required to work with foundry companies and their mutual customers by providing foundry enablement solution.
- Playing as Chip-level physical implementation experts in foundry reference flow validation and in-design flow correlation and its validation.
- Playing as Routing enablement (P&R techfile) experts and its validation Candidate should have overall design flow understanding including Sign-off.
- Physical implementation and P&R techfile-related issues between customers and corporate R&D are the major responsibility.
- Providing Cadence physical implementation tool solution in a timely manner as a Product Engineer and working closely with the customer on-site and off-site.
- Interfacing with headquarters R&D and other Product Engineer at different sites to resolve any technical issues.
- Around 13+ year professional experience (Master's degree) or 15+ year (Bachelor's degree) Mostly worked on the physical implementation (P&R) domain and P&R techfile creation & validation In-depth usage experience on dominant P&R tool (Innovus or ICC) Good hands-on physical implementation area on advanced technology nodes beyond 28nm Good communication skills internally with team members and externally with customers Speaking/writing proficiency in English We’re doing work that matters.
- Help us solve what others can’t.
Sourced directly from Cadence Design Systems’s career page
Your application goes straight to Cadence Design Systems.
Opens cadence.wd1.myworkdayjobs.com in a new tab
Specialisation
Open roles at Cadence Design Systems
658 positions
Job ID
/job/GYEONGGI-DO-Seoul/Sr-Principal-Product-Engineer---Innovus_R56001
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar Other roles
Samsung Semiconductor
Staff Engineer, SRAM Circuit Design
San Jose, California, United States|Other
Samsung Semiconductor
Senior Manager, Memory Sales
San Jose, California, United States|Other
Micron Technology
CMP PROCESS ENGINEER
Taichung - Fab 16, Taiwan|Other
Micron Technology
Senior Manager, FE Central PQE (Deviation Management)
Fab 10A, Singapore|Other