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Qualifications

  • MS/MTech/BE/ BTech in Electronics from reputed institutes with 5 + years' experience Physical design experience in ASIC design environment Should have knowledge of complete ASIC Design Flow, including Synthesis, Physical Designing , Timing Analysis, Power Analysis and Formal Verification Should have excellent leadership, communication, analytical and problem solving skills.
  • Expertise on High frequency design methodologies for complete ASIC backend flows.
  • Candidate with experience in Full Chip (SoC level) floorplanning, pin assignment, global clock distribution across all subsystems is a plus point.
  • Good communication skills, strong analytical problem solving skills and willingness to learn quickly.
  • Solid scripting skills including Python and Tcl.
  • Should be self-motivated and good team player.
  • We’re doing work that matters.
  • Help us solve what others can’t.

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Specialisation
Open roles at Cadence Design Systems
582 positions
Job ID
/job/HYDERABAD/Lead-Design-Engineer_R55524-1

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