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About This Role
- Duties: Performs semiconductor design engineering duties including design, development, and testing for firm products and devices in conjunction with product development for the electronic communications industry.
- Define and write IP verification plans based on requirements documents (industry standards, product requirements, IP architecture and IP implementation specifications).
- Write SystemVerilog (UVM) monitors, drivers, response checkers and SystemVerilog Assertion (SVA) cover properties to match the verification plans.
- Developing and maintaining portions of a verification environment including scripts and Make files.
- Debug failing test cases to determine source of failure and track resolution.
- Collect code and functional coverage results from random simulations, and analyzing uncovered events to determine additional test scenarios needed for coverage.
- Perform assertion-based formal verification of blocks and IPs to ensure they meet requirements Qualifications: Master’s degree in Electrical and Computer Engineering, Electronics Engineering, foreign equivalent or related field.
- Required skills: Position requires knowledge gained via completion of a university-level course, internship or related occupation involving: 1.
- Programming Languages C/Python; 2.
- Verilog and SystemVerilog; 3.
- Verification skills utilizing UVM (Universal Verification Methodology); 4.
- Computer Architecture; 5.
- Digital Design with FGPA; 6.
- VLSI System Design; 7.
- Verilog RTL debugging utilizing waveforms and source code browsing; and 8.
- Code and Functional Coverage generation and closure.
- Salary: $121000 per year.
- More information about NXP in the United States...
- NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law.
- In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-6aa0
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Salary range
₹5-12 LPA to ₹40-70 LPA
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773 positions
Job ID
/job/Austin-Oakhill-Office/Digital-Verification_R-10066238
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