Soc Functional Validation Engineer

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About This Role

  • This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.
  • Key Responsibilities (Include, but are not limited to): Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and system level features.
  • Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met.
  • Reviews proposed design changes to assess impact on validation plans, tasks, and timelines.
  • Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis.
  • Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues.
  • Tests interactions between various SoC features using validation infrastructure.
  • Develops post silicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing.
  • Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams.
  • Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications.
  • Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds).
  • Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.
  • This role requires regular onsite presence to fulfill essential job responsibilities.

Requirements

  • are required to be initially considered for this position.
  • Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Requirements

  • Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. 5+ years of total experience including experience in the following areas: Working/developing test plans Developing in a Linux/UNIX environment.
  • Object-oriented programming in coding any of the languages: C, C++, C#, Perl and/or Python Software.
  • Hardware, system bring-up, and/or silicon power-on.
  • Advance English level.
  • Must have unrestricted, permanent right to work in Mexico (this role is not eligible for vi-sa or immigration sponsorship).

Nice to Have

  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. 7+ years of experience with one or more of the following: Hardware/RTL development or debug experience, RTL debug, review Verilog code and correlate with waveform captures Developing test automation frameworks Debugging or developing fpga/emulation models Firmware/Software debug of large C/C++ applications, provide fixes, GitHub knowledge Experience with design and derive testing for system clock/system reset flows.
  • PCIe protocol and/or PCIe interfaces testing experience.
  • Lab equipment (Logic Analyzers, Oscilloscopes, protocol analyzers).
  • Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

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Intel

Mexico, Guadalajara

Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
712 positions
Job ID
/job/Mexico-Guadalajara/Soc-Functional-Validation-Engineer_JR0282916

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