Senior Pre-Silicon Verification Engineer

About This Role

• Intel's Central Engineering Group is seeking a Senior Pre-Silicon Verification Engineer specializing in mixed-signal verification to ensure complex analog and digital designs meet specification requirements before fabrication.
• This role focuses on developing comprehensive verification strategies for digital and mixed-signal IP blocks, creating advanced behavioral models, and executing thorough verification plans that validate functional, performance, and power requirements across Intel's cutting-edge semiconductor designs.
• Key Responsibilities Mixed-Signal Verification & Modeling Perform functional verification of digital and mixed-signal logic components including analog behavioral modeling and advanced verification techniques (UVM, real number modeling, AMS simulation).
• Create verification environments that accurately model analog-digital interactions and validate designs across process, voltage, and temperature (PVT) variations.
• Verification Planning & Environment Development Develop comprehensive IP verification plans, test benches, and scalable verification environments for mixed-signal microarchitecture specifications.
• Build verification frameworks supporting regression testing, continuous integration, and both digital and analog verification flows.
• System Simulation & Debug Execute verification plans, analyze power/timing/performance metrics, and conduct system-level simulations and corner case analysis.
• Replicate, root cause, and debug complex issues in the pre-silicon environment, implementing corrective measures to resolve failing tests.
• Cross-Functional Collaboration & Process Improvement Collaborate with digital and analog architects, RTL developers, and physical design teams to meet functional, performance, and power goals.
• Document test plans, drive technical reviews, and maintain/improve verification infrastructure and methodology while ensuring smooth pre-silicon to post-silicon correlation.