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About This Role
- Intel Israel has an opening for a Senior DFT Design Engineer focused on post-Silicon product design enabling and optimization.
- This position is in Intel’s “center of excellence” for Silicon debug supporting Client products.
- This team resolves product quality and performance issues blocking products from meeting production requirements with a combination of design and manufacturing problem solving expertise, leveraging state of the art methodologies & tools.
- This team is a critical deep portfolio and scaling it going forward.
Qualifications
- BSC or MSC degree in Engineering Previous experience in semiconductor circuit design.
- Strong verbal and written communication skills (English).
- Hands-on, self-motivated problem solver.
- Knowledge of DFT (Design for Test), previous experience in Array and Scan infrastructure, Design and Post Si enabling. previous experience in the following could be an advantage: Scan and Array insertion with Mentor/Synopsys tools Scan and Array Pre/Post Si validation and Si enabling Debug of Si issues using Scan/Array/JTAG/TAP Debug yield loss by using SCAN and Array diagnosis Further advantages: Power-on and reset flow.
- Digital circuit design methodology.
- Design structural & functional diagnosis tools & methods.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
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Specialisation
Salary range
₹5-10 LPA to ₹35-58 LPA
Open roles at Intel
712 positions
Job ID
/job/Israel-Haifa/Senior-Post-Silicon-DFT-Engineer_JR0280755
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