Senior Emulation Engineer

About This Role

• Intel put Silicon in Silicon Valley.
• No one else is obsessed with engineering and has a brighter future.
• Every day, we create world changing technology that enriches the lives of every person on earth.
• So, if you have a big idea, let's do something wonderful together.
• Join us, because at Intel, we are building a better tomorrow.
• The Role: This senior Emulation Engineer candidate will development and enable Accelerator IPs in Intel platforms by implementing and debugging complex hybrid models of SOCs, chiplet dies and the IP's for pre and post Silicon Validation and debug purposes.
• The candidate will be engaged with Design, Architecture, FW/SW, driver development team and more to develop design models for validation and verification.
• In this position your responsibilities may include: Create FPGA and Hybrid FPGA emulation models from RTL using FPGA synthesis, partitioning and routing tools.
• Define and develop new capabilities and HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon functional validation as well as SW development/validation.
• Define and document RTL changes required for emulation.
• Develop hardware collateral to be integrated with the FPGA emulation model.
• Test and debug the FPGA emulation model.
• Develop and maintain model build flows, debug capabilities Support continuous integration of model builds.
• Support Software and Validation team with model use.