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About This Role
- Intel is seeking an experienced Chassis Component IP engineer for the Intel Chassis Group, which is chartered to deliver the chassis for SoCs within Intel.
- The role involves logic design of component IPs which can be used to build an SoC chassis.
- Component IPs include protocol conversion bridges, debug/trace components, and clock and power controls.
- The ideal candidate will have a deep background in designing protocol conversion bridges for control and data planes that translate standard protocols such as AMBA/CXL to a custom transport protocol developed for the chassis, while also accounting for QoS, Access Control, Flow Control, RAS, Error Handling and Hashing.
- The candidate will also have a good understanding of debug and trace networks.
Nice to Have
- 5+ years' experience in design of protocol conversion bridges for AMBA/PCIe/CXL protocols with QoS, flow control, access control, hashing and error handling features, and/or debug trace networks • Expertise in Verilog/SystemVerilog, Lint/CDC/RDC • Expertise in AMBA (CHI, AXI, AHB, APB), Coresight and PCIe/CXL protocols • Good understanding of coherency concepts • Knowledge of DVFS and UPF • Experience in analyzing power, performance and area trade-offs in designs • Experience in working with architecture and verification teams • Ability to work with physical design to understand timing limitations and optimize component design based on these requirements • Experience In designing IP in leading edge TSMC and or Intel nodes • Experience in designing clock/power controls • Good understanding of MMU design • Experience with Jinja-based templatingIn addition to the qualifications a successful candidate will demonstrate: • Communication skills • Capacity to work across large, geographically distributed engineering teams across multiple time zones.
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Sourced directly from Intel’s career page
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Specialisation
Open roles at Intel
49 positions
Job ID
/job/India-Bangalore/Senior-Design-Engineer---Chassis-Component-IP_JR0279499
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