Physical Design Engineer

Requirements

• Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field 0-2 years of industry experience or strong academic exposure in VLSI Physical Design / Backend Design Solid understanding of Physical Design fundamentals: Floorplanning, placement, CTS, routing Timing basics (setup/hold, clocking concepts) Familiarity with Physical Design and timing analysis flows Ability to work as an individual contributor under technical guidance Strong analytical, problemsolving, and learning mindset Preferred Qualifications Handson exposure to industry EDA tools (e.g., ICC2, Innovus, PrimeTime or equivalent) Academic projects or internships involving STA, EM/IR, or Physical Design signoff Scripting experience (Tcl / Python / Perl) Exposure to advanced technology nodes and lowpower design concepts Good written and verbal communication skills Job Type: Intel Contract Employee Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).
• The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.