Opens intel.wd1.myworkdayjobs.com in a new tab
About This Role
- This role will support root cause determination of assembled package yield loss and in-line failures on a Mon-Fri standard day shift.
- The engineer will be responsible for technical functions such as design, test, checkout, modifications, and characterization of assembly technologies.
- Engineers in this role will help bridge support between compressed shift engineers, engineering technicians, as well as module partners, yield support, integration and program customers in a collaborative environment.
- As part of this role, the engineer will help align program priorities, share and provide technical expertise regarding analysis results, and ensure an inclusive work environment.
- Engineers can expect to work collaboratively with additional engineers and engineering technicians to conduct analyses and engineering tests to accomplish fault isolation of electrical failures and perform defect and/or process characterization in support of identifying key mechanisms that contribute to root cause identification.
- Your main responsibilities include, but are not limited to: Working across team boundaries to achieve strategic objectives and meet program deliverables.
- Understand and support program milestones and schedules.
- Interface with a wide variety of internal teams to improve yield and drive innovation.
- Conduct hands-on lab work, define data acquisition strategy and data analysis plan, and recommend corrective actions and/or fixes to internal customers.
- Develop failure analysis innovative techniques, BKMs, and/or approaches to accelerate failure identification and mechanism understanding.
- Provide consultation concerning packaging and/or assembly problems and improvements in the manufacturing process.
- Respond to customers' requests or events as they occur.
- Candidate should be capable of working effectively across organizational boundaries.
- Candidate must exhibit the following traits/skills: Work with ambiguity and flexibility with respect to job roles and working hours, have strong analytical and problem-solving skills, and possess robust communication and presentation skills.
- Excellent communication to yield engineers, LYA analysts, and other customers.
- Ability to work in a collaborative manner with a variety of different individuals in a fast paced, technical environment.
- Ability to work effectively in an ambiguous environment where changing priorities and the norm.
- This role is lab-based and on-site required.
Requirements
- Bachelor's degree discipline with 1-3 yrs experience or Master's Degree or PhD in Materials Science and Engineering, Mechanical Engineering, Chemical Engineering, Electrical Engineering, or Chemistry and Physics or related field US Citizenship is required.
- Ability to obtain and maintain a US Government TS/SCI Security Clearance with Polygraph.
Nice to Have
- Active US Government TS/SCI Security Clearance with Polygraph.
- Experience working in a lab environment or with lab equipment in academic setting.
- Experience including labs or coursework pertaining to optical analysis techniques such as SEM, TEM, x-ray, and optical microscopy Experience including labs or coursework providing fundamental understanding of electrical circuits.
- This could include circuits and electronics courses, labs, and hands-on experience with multimeters and other probing equipment including any specialized equipment such as: TDR, EOTPR, EBAC, RIDR, and/or ELITE.
- Experience including labs or coursework with chemical compositional analysis techniques such as EDX.
- AFM, FTIR, Raman, and diffraction techniques such as XRD and EBSD.
- Experience with CAD software and basic statistical analysis tools such as JMP.
Benefits
- We offer a total compensation package that ranks among the best in the industry.
- It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
- Find out more about the benefits of working at Intel .
- Annual Salary Range for jobs which could be performed in the US: $85,200.00-162,500.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
- Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
- Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Sourced directly from Intel’s career page
Your application goes straight to Intel.
Opens intel.wd1.myworkdayjobs.com in a new tab
Specialisation
Open roles at Intel
614 positions
Job ID
/job/US-Arizona-Phoenix/Package-Failure-Analysis-Engineer_JR0286612
Get matched to roles like this
Upload your resume once. We’ll notify you when matching roles open up.
Join talent pool — freeSimilar Other roles
Samsung Semiconductor
Credit Analyst
San Jose, California, United States|Other
Micron Technology
Senior ASIC Test Lab Equipment Engineer
Taichung - MTB, Taiwan|Other
Micron Technology
Intern, PDE PCS
Fab 10A, Singapore|Other
Micron Technology
Staff Engineer, NAND Product Engineering
Fab 10N/X, Singapore|Other