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About This Role
- The Role and Impact Join Intel's innovative team as an IP Logic Design Engineer, where you will contribute to the creation of cutting-edge semiconductor technologies.
- This role is pivotal in designing and optimizing Intellectual Property (IP) blocks integral to next-generation Custom System-on-Chip (SoC) designs.
- Your efforts will drive advancements in low-power, high-performance architectures, directly impacting Intel's leadership in the semiconductor industry.
- Collaborating with world-class engineers, you will tackle complex technical challenges and play a vital role in Intel's continued success.
- Key Responsibilities - Develop and implement Register Transfer Level (RTL) coding and simulations for IP blocks, ensuring seamless integration into SoC designs. - Collaborate on defining architecture and microarchitecture features for IP blocks, aligning them with system requirements. - Optimize logic designs to meet power, performance, area, and timing objectives while ensuring design integrity for physical implementation. - Debug RTL designs and resolve test failures to ensure correctness and high-quality delivery of features. - Perform front-end quality checks, including CDC, RDC, LINT, synthesis, and timing closure. - Support SoC customers during IP integration and verification, addressing technical issues as needed. - Review verification plans to validate design features and implement corrective measures for any discrepancies. - Drive quality assurance compliance for smooth IP-SoC handoff and integration processes.
Requirements
- Bachelor's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related field, with 8+ years of experience in digital design and RTL coding.
- A Master's degree with 6+ years of experience or a PhD with 4+ years of experience may also qualify. - Proficiency in RTL design, SystemVerilog, and low-power design methodologies. - Hands-on experience with front-end tools such as CDC, RDC, LINT, synthesis, and timing closure. - Advanced knowledge of protocols including PCIe, AXI, AHB, and APB. - Expertise in UPF low-power coding, clock gating, clock domain crossing, and power gating techniques. - Experience debugging RTL designs, writing verification testbenches, and using scripting languages such as TCL.
- Preferred Qualifications - Master's degree or PhD in Electronics Engineering, Computer Engineering, or a related field. - Proven track record of collaboration across functional teams and solving complex design challenges. - Strong communication skills and the ability to effectively articulate technical concepts.
- Explore the opportunity to be part of Intel's transformative innovations and contribute to shaping the future of semiconductor technology.
- Apply today to advance your career and help drive meaningful change.
Sourced directly from Intel’s career page
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Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
101 positions
Job ID
/job/India-Bangalore/IP-Logic-Design-Engineer_JR0284213
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