DFT Design Engineering Intern

About This Role

• In this position, you will be involving in the training, design and development of next generation SOC by using AI for wide range of Intel products.
• Your responsibilities will include one or some of the following but not limited to: Perform evaluation and development of new DFT test methodology to meet guaranteed specification and screen defects on silicon which meets Intel's product quality commitment Assist DFT Engineers in implementation of defined DFT architecture.
• Use CAD tool extensively to simulate logic behavior and circuit performance Understand VLSI Structural Design methodology and automate design flows Implement DFT designs within the confines of structural and physical parameters, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration.
• Developing AI capabilities for the above items that includes AI skills, agent and building agentic AI flow.