Senior SOC Design For Test Engineer

What You'll Do

• Define and implement Digital Design For Test (DFT) architectures and solutions at IP, subsystem, and SoC level based on product requirements and specifications.
• Develop and integrate DFT features including Scan, ATPG, Memory BIST, Logic BIST, JTAG, and related test structures.
• Align DFT implementation across SoC platforms and IP blocks to ensure efficient, scalable, and high-quality test solutions.
• Develop and execute ATPG patterns to achieve target fault coverage for Stuck-At, Transition Delay, Memory BIST, and Logic BIST testing.
• Perform DFT verification, simulations, and validation activities to ensure the correctness and effectiveness of implemented test solutions.
• Collaborate with design, verification, physical design, and product engineering teams throughout the development cycle to ensure testability requirements are met.
• Support silicon bring-up activities and participate in post-silicon evaluation to ensure manufacturing test patterns are operational from first silicon.
• Analyze test results, debug failures, identify root causes, and drive yield and quality improvements.
• Work with manufacturing and ATE teams to enable efficient production test flows.
• Evaluate and adopt new DFT methodologies, tools, and industry best practices to improve test quality, coverage, and cost efficiency.
• Document DFT architecture, implementation details, verification strategies, and test plans.
• Provide technical leadership and mentorship to junior engineers when appropriate.
• Qualifications Required Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Microelectronics, or a related field.
• Strong experience in DFT design and verification for complex ASIC or SoC products.
• Solid understanding of DFT methodologies including: Scan DesignATPGMemory BISTLogic BISTJTAG / Boundary Scan Experience with industry-standard DFT tools such as Synopsys TestMAX, Cadence Modus, or Siemens Tessent.
• Good understanding of digital design fundamentals, ASIC/SoC development flows, and semiconductor manufacturing test concepts.
• Experience with Verilog/SystemVerilog.
• AI Driven programming or scripting skills using TCL, Python, Perl, or similar languages.
• Strong analytical and problem-solving skills.
• Effective communication and collaboration skills in a multidisciplinary environment.
• Preferred Experience supporting silicon bring-up and post-silicon debug activities.
• Experience in driving DFT conception and development with AI tools.
• Familiarity with ATE test development and manufacturing test flows.
• Knowledge of advanced semiconductor process technologies.
• Experience working on Automotive or Industrial semiconductor products.
• Why Join NXP? At NXP, we develop innovative semiconductor solutions that power secure connections and infrastructure for a smarter world.
• Our technologies can be found in vehicles, mobile devices, industrial systems, and countless connected applications.
• Joining the ACE team offers the opportunity to work on cutting-edge SoCs, collaborate with world-class engineering teams, and contribute to products that make life easier, safer, and more connected.
• More information about NXP in France... #LI-7795