Design Verification Architect

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About This Role

  • Position Overview Defines, architects, and documents verification strategy and methodologies for implementing and verifying the pre-silicon design in the most optimal manner.
  • Architects testbenches and develops Universal Verification Methodology (UVM) or formal-based verification approaches.
  • Integrates block testbenches in chip-level UVM environments and verifies integration.
  • Key Responsibilities Define, architect, and document verification strategy and methodologies for implementing and verifying pre-silicon design in the most optimal manner Architect testbenches and develop Universal Verification Methodology (UVM) or formal-based verification approaches Integrate block testbenches in chip-level UVM environments and verify integration Develop test strategy, testbench architecture, and test plans for design blocks to conform to specifications Enable interaction with analog and digital teams and support post-silicon validation activities Collaborate with architecture and design teams to create random test generation plans, run functional simulations to identify gaps in design specifications, and conduct failure analysis, coverage analysis, and closure Define and develop the security validation strategy and validation infrastructure to incorporate security tools and methods to improve security coverage You should demonstrate the following professional traits to be successful Collaborative and communicative, with the ability to work across diverse teams and mentor junior engineers Strong problem-solving skills with disciplined execution and a proactive mindset Results-driven, with the ability to drive optimal solutions between analog and digital designs Qualifications: Minimum qualifications are required to be initially considered for this position.
  • Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
  • It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel .
  • Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations.
  • Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
  • Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

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Intel

US, California, Folsom

Specialisation
Salary range
₹5-12 LPA to ₹40-70 LPA
Open roles at Intel
650 positions
Job ID
/job/US-California-Folsom/Design-Verification-Architect_JR0286045-1

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